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DP83256 Datasheet(PDF) 61 Page - Texas Instruments |
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DP83256 Datasheet(HTML) 61 Page - Texas Instruments |
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61 / 146 page  50 Registers (Continued) 516 CURRENT NOISE COUNT REGISTER (CNCR) The Current Noise Count Register takes a snap-shot of the Noise Timer during every Control Bus Interface read cycle of this register During a Control Bus Interface write cycle the Control Bus Write Command Reject bit (CCR) of the Interrupt Condition Register (ICR) will be set to 1 and will ignore a write cycle ACCESS RULES ADDRESS READ WRITE 0Fh Always Write Reject D7 D6 D5 D4 D3 D2 D1 D0 NCLSCD CNC6 CNC5 CNC4 CNC3 CNC2 CNC1 CNC0 Bit Symbol Description D0 – D6 CNC0 – CNC6 CURRENT NOISE COUNT BIT k0–6l Snapshot of the Noise Counter D7 NCLSCD NOISE COUNTER LINE STATE CHANGE DETECTION 60 |
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