TMS320VC5509 datasheet(64/122 Pages) TI

64 / 122 page

Functional Overview

April 2001 − Revised September 2004

SPRS163G

Table 3−33. USB Module Registers (Continued)

WORD ADDRESS

RESET VALUE†

DESCRIPTION

CONTROL AND STATUS REGISTERS (CONTINUED)

0x6797

IDMAGINT

Input DMA Go Interrupt Register

xxxx xxxx 0000 0000

0x6798

ODMAGINT

Output DMA Go Interrupt Register

xxxx xxxx 0000 0000

0x6799

IDMAMSK

Input DMA Interrupt Mask Register

xxxx xxxx 0000 0000

0x679A

ODMAMSK

Output DMA Interrupt Mask Register

xxxx xxxx 0000 0000

0x679B

IEDBMSK

Input EDB Interrupt Mask Register

xxxx xxxx 0000 0000

0x679C

OEDBMSK

Output EDB Interrupt Mask Register

xxxx xxxx 0000 0000

0x67F8

FNUML

Frame Number Low Register

xxxx xxxx 0000 0000

0x67F9

FNUMH

Frame Number High

xxxx xxxx xxxx x000

0x67FA

PSOFTMR

PreSOF Interrupt Timer Register

xxxx xxxx 0000 0000

0x67FC

USBCTL

USB Control Register

xxxx xxxx 0101 0000

0x67FD

USBMSK

USB Interrupt Mask Register

xxxx xxxx 0000 0000

0x67FE

USBSTA

USB Status Register

xxxx xxxx 0000 0000

0x67FF

FUNADR

Function Address Register

xxxx xxxx x000 0000

0x7000

USBIDLECTL

USB Idle Control and Status Register

xxxx xxxx xxxx x000

† Hardware reset; x denotes a “don’t care.”

NOTE: The USB module must be brought out of reset by setting bit 2 of the USB Idle Control and Status Register before any USB module register

read or write attempt.

Table 3−34. Analog-to-Digital Controller (ADC) Registers

WORD ADDRESS

DESCRIPTION

RESET VALUE†

0x6800

ADCCTL[15:11]

ADC Control Register

0111 0000 0000 0000

0x6801

ADCDATA[15:0]

ADC Data Register

0111 0000 0000 0000

0x6802

ADCCLKDIV[15:0]

ADC Function Clock Divider Register

0000 0000 0000 1111

0x6803

ADCCLKCTL[8:0]

ADC Clock Control Register

0000 0000 0000 0111

† Hardware reset; x denotes a “don’t care.”

Table 3−35. External Bus Selection Register

WORD ADDRESS

DESCRIPTION

RESET VALUE†

0x6C00

EBSR[15:0]

External Bus Selection Register

0000 0000 0000 0011‡

† Hardware reset; x denotes a “don’t care.”

‡ The reset value is 0000 0000 0000 0001 if GPIO0 = 1; the value is 0000 0000 0000 0011 if GPIO0 = 0.

Table 3−36. Secure ROM Register

WORD ADDRESS

DESCRIPTION

RESET VALUE†

0x7400

SROM[0]

Secure ROM Register

0000 0000 0000 0000

† Hardware reset; x denotes a “don’t care.”

TMS320VC5509 Datasheet(PDF) 64 Page - Texas Instruments

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