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TMS320VC5509 Datasheet(PDF) 72 Page - Texas Instruments |
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TMS320VC5509 Datasheet(HTML) 72 Page - Texas Instruments |
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72 / 122 page ![]() Electrical Specifications 72 April 2001 − Revised September 2004 SPRS163G 5 Electrical Specifications This section provides the absolute maximum ratings and the recommended operating conditions for the TMS320VC5509 DSP. All electrical and switching characteristics in this data manual are valid over the recommended operating conditions unless otherwise specified. 5.1 Absolute Maximum Ratings The list of absolute maximum ratings are specified over operating case temperature. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Section 5.2 is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to VSS. Figure 5−1 provides the test load circuit values for a 3.3-V I/O. Supply voltage I/O range, DVDD − 0.3 V to 4.0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage core range, CVDD − 0.3 V to 2.0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI − 0.3 V to 4.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range, VO − 0.3 V to 4.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating case temperature range, TC − 40 °C to 85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range Tstg − 55 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 Recommended Operating Conditions MIN NOM MAX UNIT Core and Internal Memory CVDD Device supply voltage, core 144 MHz 1.52 1.6 1.68 V RVDD Device supply voltage, on-chip memory, 144 MHz 1.52 1.6 1.68 V Peripherals RCVDD RTC module supply voltage, core 1.52 1.6 1.68 V RDVDD RTC module supply voltage, I/O (RTCINX1 and RTCINX2) 1.52 1.6 1.68 V USBVDD USB module supply voltage, I/O (DP, DN, and PU) 3 3.3 3.6 V DVDD Device supply voltage, I/O (except DP, DN, PU, SDA, SCL)† 2.7 3.3 3.6 V ADVDD A/D module digital supply voltage 2.7 3.3 3.6 V AVDD A/D module analog supply voltage 2.7 3.3 3.6 V Grounds VSS Supply voltage, GND, I/O, and core 0 V ADVSS Supply voltage, GND, A/D module, digital 0 V AVSS Supply voltage, GND, A/D module, analog 0 V † The I2C pins SDA and SCL do not feature fail-safe I/O buffers. These pins could potentially draw current when the device is powered down. Due to the fact that different voltage devices can be connected to the I2C bus, the level of logic 0 (low) and logic 1 (high) are not fixed and depends on the associated VDD. ‡ USB I/O pins DP and DN can tolerate a short circuit at D+ and D− to 0 V or 5 V, as long as the recommended series resistors (see Figure 5−40) are connected between the D+ and DP (package), and the D− and DN (package). Do not apply a short circuit to the USB I/O pins DP and DN in absence of the series resistors. NOTE: USB PLL is powered from the core supply and is susceptible to core power supply ripple. The maximum allowable supply ripple is 1% for 1 Hz to 5 kHz; 1.5% for 5 kHz to 10 MHz; 3% for 10 MHz to 100 MHz, and less than 5% for 100 MHz or greater. |
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