LP5523 datasheet(27/56 Pages) TI1

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LP5523

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SNVS550D – SEPTEMBER 2009 – REVISED MAY 2013

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Engine 3 program execution control. Equivalent to engine 1 control bits. Program start address can be

programmed to Program Counter (PC) register 39H.

01 ENGINE CONTROL2

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Operation modes are defined in this register.

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Disabled: Engines can be configured to disabled mode each one separately.

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Load program: Writing to program memory is allowed only when the engine is in load program operation

mode and engine busy bit (reg 3A) is not set. Serial bus master should check the busy bit before writing to

program memory or allow at least 1ms delay after entering to load mode before memory write, to ensure

initalization. All the three engines are in hold while one or more engines are in load program mode. PWM

values are frozen, also. Program execution continues when all the engines are out of load program mode.

Load program mode resets the program counter of the respective engine. Load program mode can be

entered from the disabled mode only. Entering load program mode from the run program mode is not

allowed.

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Run Program:Run program mode executes the instructions stored in the program memory. Execution

once). Program start address can be programmed to the Program Counter (PC) register. The Program

Counter is reset to zero when the PC’s upper limit value is reached.

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Halt: Instruction execution aborts immediately and engine operation halts.

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01 — Bit [5:4] ENGINE1_MODE

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00 = disabled.

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01 = load program to SRAM, reset engine 1 PC.

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10 = run program as defined by ENGINE1_EXEC bits.

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11 = halts the engine.

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01 — Bits [3:2] ENGINE2_MODE

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00 = disabled.

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01 = load program to SRAM, reset engine 2 PC.

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10 = run program as defined by ENGINE2_EXEC bits.

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11 = halts the engine.

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01 — Bits [3:2] ENGINE3_MODE

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00 = disabled.

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01 = load program to SRAM, reset engine 3 PC.

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10 = run program as defined by ENGINE3_EXEC bits.

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11 = halts the engine.

02 OUTPUT DIRECT/RATIOMETRIC MSB

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A particular feature of the LP5523 is the ratiometric up/down dimming of the RGB-LEDs. In other words, the

LED driver PWM output will vary in a ratiometric manner. By a ratiometric approach the emitted color of an

RGB–LED remains the same regardless of the initial magnitudes of the R/G/B PWM outputs. For example, if

the PWM output of the red LED output is doubled, the output of green LED is doubled also.

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02 — Bit [0] D9_RATIO_EN

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1 = enables ratiometric diming for D9 output.

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0 = disables ratiometric dimming for D9 output.

03 OUTPUT DIRECT/RATIOMETRIC LSB

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03 — Bit [7] D8_RATIO_EN

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1 = enables ratiometric diming for D8 output.

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0 = disables ratiometric dimming for D8 output.

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03 — Bit [0] D1_RATIO_EN to Bit [6] D7_RATIO_EN

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The options for D1 output to D7 output are the same as above — see the “03 — Bit [7]” section.

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