LP5523 datasheet(15/56 Pages) TI1

15 / 56 page

0,0

64,0

128,0

192,0

256,0

DIMMING CONTROL (DEC)

100,0

80,0

60,0

40,0

20,0

0,0

128

192

256

100

LP5523

www.ti.com

SNVS550D – SEPTEMBER 2009 – REVISED MAY 2013

Figure 19. Logarithmic vs Linear Dimming

Powering LEDs

The LP5523 is very suitable for white LED and general purpose applications, and it is particularly well suited to

use with RGB LEDs. The LP5523’s architecture is optimized for use with three RGB LEDs. Typically, the red

LEDs have forward voltages below 2 volts, thus red LEDs can be powered directly from VDD. In the LP5523 D7,

D8 and D9 drivers are powered from the battery voltage (VDD), not from the charge-pump output. D1 to D6

drivers are internally connected to the charge-pump output, and these outputs can be used for driving green and

blue (VF = 2.7V to 3.7V typ.) or white LEDs. Of course, D7, D8 and D9 outputs can be used for green, blue or

white LEDs if the VDD voltage is high enough.

An RGB LED configuration example is given in the Typical Applications section at the end of this document.

Controlling the High-Side LED Drivers

1. Direct PWM Control

All LP5523 LED drivers, D1 to D9, can be controlled independently through the two-wire serial I2C-compatible

interface. For each high-side driver there is a PWM control register. Direct PWM control is active by default.

2. Controlling by Program Execution Engines

Engine control is used when the user wants to create programmed sequences. The program execution engine

has a higher priority than direct control registers. Therefore, if the user has set the PWM register to a certain

value, it will be automatically overridden when the program execution engine controls the driver. LED control and

program execution engine operation is described in the section Control Register Details.

3. Master Fader Control

In addition to LED-by-LED PWM register control, the LP5523 is equipped with so-called master fader control,

which allows the user to fade in or fade out multiple LEDs by writing to only one register. This is a useful function

to minimize serial bus traffic between the MCU and the LP5523. The LP5523 has three master fader registers,

so it is possible to form three master fader groups.

I2C-Compatible Control Interface

The I2C-compatible synchronous serial interface provides access to the programmable functions and registers on

the device. This protocol uses a two-wire interface for bidirectional communications between the IC's connected

to the bus. The two interface lines are the Serial Data Line (SDA), and the Serial Clock Line (SCL). Every device

on the bus is assigned a unique address and acts as either a Master or a Slave depending on whether it

generates or receives the serial clock SCL. The SCL and SDA lines should each have a pullup resistor placed

somewhere on the line and remain HIGH even when the bus is idle. Note: CLK pin is not used for serial bus data

transfer.

Submit Documentation Feedback

Product Folder Links: LP5523

LP5523 Datasheet(PDF) 15 Page - Texas Instruments

LP5523 Datasheet(HTML) 15 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL