GS2965 datasheet(16/41 Pages) SEMTECH

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GS2965 Multi-Rate SDI Reclocker with Equalization &

De-emphasis

Data Sheet

52462 - 4

July 2012

16 of 41

Proprietary & Confidential

4. Detailed Description

The GS2965 is a multi-standard reclocker for serial digital SDTV signals operating at

270Mb/s, and HDTV signals operating at 1.485Gb/s, 1.485/1.001Gb/s, 2.97Gb/s and

2.97/1.001Gb/s.

4.1 Serial Data Input

The GS2965 features two differential input buffers.

The serial data input signal is connected to the DDI0/DDI0 and DDI1/DDI1 input pins of

the device.

Input signals can be single-ended or differential, DC or AC-coupled.

The input circuit is self-biasing, to allow for simple AC or DC-coupling of input signals to

the device.

The serial digital data inputs are also compatible when DC-coupled with LVPECL or

CML differential outputs from crosspoint switches which operate from 3.3V or 2.5V

supplies. This includes but is not limited to: GS2974A, GS2974B, and GS2984 equalizers.

4.2 Modes of Operation

The GS2965 has two modes of operation: Legacy Mode (HIF = HIGH) and SPI Mode (HIF

= LOW).

In Legacy Mode, chip functions are controlled via pins only, and offers limited control of

input equalization.

In SPI mode, access is gained to extended digital controls like: Bypass, Autobypass,

Auto/Manual selection, Control status inputs or outputs, changes to KBB settings,

additional EQ and DE settings as well as access to additional features such as LOS

adjustment, polarity invert, auto-mute, etc.

4.3 Input Trace Equalization

The GS2965 features adjustable trace equalization to compensate for PCB trace

dielectric losses at 1.5GHz.

The trace equalization has three peak-gain settings. The maximum peak gain value is

optimized for compensating the high-frequency losses associated with 25 inches of

5-mil stripline in FR4 material. For boards with different striplines or materials, users

can experiment to find the EQ setting which optimizes their system performance.

These settings are accessible via the serial host interface.

Each serial digital input, DDI, DDI, includes a pin EQn_EN to turn its trace equalizer on

or off. When a pin EQn_EN is tied LOW or left unconnected, the trace equalization for

input n is set to the Low Range.

When an EQn_EN pin is tied HIGH, and input n is selected, the trace equalization for

input n is set to the Medium Range.

GS2965 Datasheet(PDF) 16 Page - Semtech Corporation

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