GS2965 datasheet(22/41 Pages) SEMTECH

22 / 41 page

GS2965 Multi-Rate SDI Reclocker with Equalization &

De-emphasis

Data Sheet

52462 - 4

July 2012

22 of 41

Proprietary & Confidential

Figure 4-3: GS2965 Automatic Mode Search Algorithm

In MANUAL mode, the SS[1:0] registers become read or write accessible, and the data

rate can be programmed. In this mode, the search algorithm is disabled and the GS2965's

PLL will only lock to the data rate selected in accordance with Table 4-8.

4.11 SD/HD Indication

The SD/HD signal indicates the output data rate of the device and can be connected to

the SD/HD input pin of dual slew rate cable drivers such as the GS2988.

When this signal is HIGH, the data rate is 270Mb/s. This signal is LOW for all other data

rates.

This signal is also LOW when the device is operating in bypass mode (Auto-bypass and

User-bypass).

The SD/HD signal is LOW when the device is not locked.

4.12 Bypass Mode

In bypass mode, the GS2965 passes the data at the inputs, directly to the output. There

are two register bits that control the bypass function: BYPASS and AUTOBYPASS.

The BYPASS bit is an active-high signal which forces the GS2965 into bypass mode for

as long as the bit is asserted HIGH.

The AUTOBYPASS bit is an active-high signal that places the GS2965 into bypass mode

only when the PLL has not locked to a data rate.

Table 4-8: Data Rate Indication/Selection Bit Pattern

SS[1:0]

Data Rate (Mb/s)

0Reserved

270

1485 or 1485/1.001

2970 or 2970/1.001

Power up

270Mb/s

1485Mb/s

2970Mb/s

*Note: the search algorithm does not necessarily begin with 270Mb/s.

GS2965 Datasheet(PDF) 22 Page - Semtech Corporation