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TAS5026 Datasheet(PDF) 28 Page - Texas Instruments |
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TAS5026 Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 48 page  Architecture Overview 23 SLES041B—November 2002 TAS5026 2.5.4 Multiple Byte Read A multiple byte data read transfer is identical to a single byte data read transfer except that multiple data bytes are transmitted by the TAS5026 to the master device as shown in Figure 2–17. Except for the last data byte, the master device responds with an acknowledge bit after receiving each data byte. A6 A0 ACK Acknowledge I2C Device Address and Read/Write Bit R/W A6 A0 R/W ACK A4 A0 ACK D7 D0 ACK Start Condition Stop Condition Acknowledge Acknowledge Acknowledge Last Data Byte D7 D6 D1 D0 ACK First Data Byte Repeat Start Condition Not Acknowledge I2C Device Address and Read/Write Bit Register Address Other Data Bytes A7 A6 A5 Figure 2–17. Multiple Byte Read |
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