LMX2471 datasheet(17/36 Pages) NSC

17 / 36 page

Bench Test Setups (Continued)

INPUT IMPEDANCE MEASUREMENT PROCEDURE

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The above block diagram shows the test procedure measur-

ing the input impedance for the LMX2471. This applies to the

FinRF, FinIF, and OSCin pins and is measured in a 50 ohm

environment. The basic test procedure is to calibrate the

network analyzer, ensure that the part is powered up, and

then measure the input impedance. The network analyzer

can be calibrated by using either calibration standards or by

soldering resistors directly to the evaluation board. An open

can be implemented by putting no resistor, a short can be

implemented by using a 0 ohm resistor, and a load can be

implemented by using two 100 ohm resistors in parallel.

Note that no DC blocking capacitor is used for this test

procedure. This is done with the PLL removed from the PCB.

This requires the use of a clamp down fixture that may not

always be generally available. If no clamp down fixture is

available, then this procedure can be done by calibrating up

to the point where the DC blocking capacitor usually is, and

then adding a 0 ohm resistor back for the actual measure-

ment. Once that the network analyzer is calibrated, it is

necessary to ensure that the PLL is powered up. This can be

done by toggling the power down bits (RF_PD and IF_PD)

and observing that the current consumption indeed in-

creases when the bit is disabled. Sometimes it may be

necessary to apply a signal to the OSCin pin in order to

program the part. If this is necessary, disconnect the signal

once it is established that the part is powered up. It is useful

to know the input impedance of the PLL for the purposes of

debugging RF problems and designing matching networks.

Another use of knowing this parameter is make the trace

width on the PCB such that the input impedance of this trace

matches the real part of the input impedance of the PLL

frequency of operation. In general, it is good practice to keep

trace lengths short and make designs that are relatively

resistant to variations in the input impedance of the PLL.

LMX2471 Datasheet(PDF) 17 Page - National Semiconductor (TI)