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MIC7401 Datasheet(PDF) 35 Page - Micrel Semiconductor |
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MIC7401 Datasheet(HTML) 35 Page - Micrel Semiconductor |
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35 / 68 page ![]() Micrel, Inc. MIC7401 March 16, 2015 35 Revision 1.0 Timing Diagrams Normal Power-Up Sequence for Outputs The STDEL register sets the delay between powering up of each regulator at initial power-up (see power up sequencing in Figure 19). Once all the internal power good registers PGOOD[1-6] are all 1, then the global PG pin goes high without delay. The PORDEL register sets the delay for the POR flag pin. The POR delay time starts as soon as AVIN pin voltage rises above the system UVLO upper threshold set by the PORUP register. The POR output goes low without delay if AVIN falls below the lower UVLO threshold set by the PORDN register. Figure 19. MIC7401 Power-Up/-Down |
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