MSP3410D datasheet(18/83 Pages) MICRONAS

18 / 83 page

MSP 34x0D

PRELIMINARY DATA SHEET

Micronas

5.1. Protocol Description

Write to DSP or Demodulator

Read from DSP or Demodulator

Write to Control or Test Registers

Note: S =

I2C bus Start Condition from master

P =

I2C bus Stop Condition from master

ACK =

Acknowledge-Bit: LOW on I2C_DA from slave (

=MSP, gray)

or master (

=CCU, hatched)

NAK =

Not-Acknowledge Bit: HIGH on I2C_DA from master (

=CCU, hatched) to indicate ‘End of Read’

or from MSP indicating internal error state

Wait =

I2C clock line held low by the slave (

=MSP) while interrupt is serviced (<1.8 ms)

Fig. 5–1: I2C bus protocol

(MSB first; data must be stable while clock is high)

Table 5–3: Control Register (Subaddress: 00 hex)

Name

Subaddress

MSB

13..1

LSB

CONTROL

00 hex

1 : RESET

0 : normal

Swrite

device

address

Wait

ACK

subaddr

ACK

addr byte

high

ACK

addr byte

low

ACK

data byte

high

ACK

data byte

low

ACK

Swrite

device

address

Wait

ACK

subaddr

ACK

addr byte

high

ACK

addr byte

low

ACK

read

device

address

Wait

ACK

data byte

high

ACK

data byte

low

NAK

Swrite

device

address

Wait

ACK

subaddr

ACK

data byte high

ACK

data byte low

ACK

I2C_DA

I2C_CL

MSP3410D Datasheet(PDF) 18 Page - Micronas

MSP3410D Datasheet(HTML) 18 Page - Micronas

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