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DS2155 Datasheet(PDF) 77 Page - Dallas Semiconductor

Part # DS2155
Description  T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface
PDF  262 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS2155 Datasheet(HTML) 77 Page - Dallas Semiconductor

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DS2156
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12.
LOOPBACK CONFIGURATION
Register Name:
LBCR
Register Description:
Loopback Control Register
Register Address:
4Ah
Bit #
7
6
5
4
3
2
1
0
Name
—
—
—
LIUC
LLB
RLB
PLB
FLB
Default
0
0
0
0
0
0
0
0
Bit 0/Framer Loopback (FLB). This loopback is useful in testing and debugging applications. In FLB, the
DS2156 loops data from the transmit side back to the receive side. When FLB is enabled, the following occurs:
1) T1 Mode: An unframed all-ones code is transmitted at TPOSO and TNEGO.
E1 Mode: Normal data is transmitted at TPOSO and TNEGO.
2) Data at RPOSI and RNEGI is ignored.
3) All receive-side signals take on timing synchronous with TCLK instead of RCLKI.
Please note that it is not acceptable to have RCLK connected to TCLK during this loopback because this
causes an unstable condition.
0 = loopback disabled
1 = loopback enabled
Bit 1/Payload Loopback (PLB). When PLB is enabled, the following occurs:
1) Data is transmitted from the TPOSO and TNEGO pins synchronous with RCLK instead of TCLK.
2) All the receive side signals continue to operate normally.
3) Data at the TSER, TDATA, and TSIG pins is ignored.
4) The TLCLK signal becomes synchronous with RCLK instead of TCLK.
0 = loopback disabled
1 = loopback enabled
T1 Mode. Normally, this loopback is only enabled when ESF framing is being performed but can also be
enabled in D4 framing applications. In a PLB situation, the DS2156 loops the 192 bits of payload data
(with BPVs corrected) from the receive section back to the transmit section. The FPS framing pattern,
CRC6 calculation, and the FDL bits are not looped back; they are reinserted by the DS2156.
E1 Mode. In a PLB situation, the DS2156 loops the 248 bits of payload data (with BPVs corrected) from
the receive section back to the transmit section. The transmit section modifies the payload as if it was input
at TSER. The FAS word; Si, Sa, and E bits; and CRC4 are not looped back; they are reinserted by the
DS2156.
Bit 2/Remote Loopback (RLB). In this loopback, data input by the RPOSI and RNEGI pins is transmitted back to
the TPOSO and TNEGO pins. Data continues to pass through the receive-side framer of the DS2156 as it would
normally. Data from the transmit-side formatter is ignored. See Figure 2-1 for more details.
0 = loopback disabled
1 = loopback enabled



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