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DS2155 Datasheet(PDF) 79 Page - Dallas Semiconductor

Part # DS2155
Description  T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface
PDF  262 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS2155 Datasheet(HTML) 79 Page - Dallas Semiconductor

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12.1 Per-Channel Loopback
The per-channel loopback registers (PCLRs) determine which channels (if any) from the backplane
should be replaced with the data from the receive side or, i.e., off of the T1 or E1 line. If this loopback is
enabled, then transmit and receive clocks and frame syncs must be synchronized. One method to
accomplish this is to connect RCLK to TCLK and RFSYNC to TSYNC. There are no restrictions on
which channels can be looped back or on how many channels can be looped back.
Each of the bit positions in the per-channel loopback registers (PCLR1/PCLR2/PCLR3/PCLR4)
represents a DS0 channel in the outgoing frame. When these bits are set to a 1, data from the
corresponding receive channel replaces the data on TSER for that channel.
Register Name:
PCLR1
Register Description:
Per-Channel Loopback Enable Register 1
Register Address:
4Bh
Bit #
7
6
5
4
3
2
1
0
Name
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
Default
0
0
0
0
0
0
0
0
Bits 0 to 7/Per-Channel Loopback Enable for Channels 1 to 8 (CH1 to CH8)
0 = loopback disabled
1 = enable loopback; source data from the corresponding receive channel
Register Name:
PCLR2
Register Description:
Per-Channel Loopback Enable Register 2
Register Address:
4Ch
Bit #
7
6
5
4
3
2
1
0
Name
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
Default
0
0
0
0
0
0
0
0
Bits 0 to 7/Per-Channel Loopback Enable for Channels 9 to 16 (CH9 to CH16)
0 = loopback disabled
1 = enable loopback; source data from the corresponding receive channel



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