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DS2155 Datasheet(PDF) 31 Page - Dallas Semiconductor |
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DS2155 Datasheet(HTML) 31 Page - Dallas Semiconductor |
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31 / 262 page ![]() DS2156 31 of 262 3.7 Line Interface Pins Signal Name: MCLK Signal Description: Master Clock Input Signal Type: Input A (50ppm) clock source is applied at this pin. This clock is used internally for both clock/data recovery and for the jitter attenuator for T1 and E1 modes. A quartz crystal of 2.048MHz can be applied across MCLK and XTALD instead of the clock source. The clock rate can be 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz. When using the DS2156 in T1-only operation, a 1.544MHz (50ppm) clock source can be used. Signal Name: XTALD Signal Description: Quartz Crystal Driver Signal Type: Output A quartz crystal of 2.048MHz (optional 1.544MHz in T1-only operation) can be applied across MCLK and XTALD instead of a clock source at MCLK. Leave open circuited if a clock source is applied at MCLK. Signal Name: 8XCLK Signal Description: Eight Times Clock (8x) Signal Type: Output An 8x clock that is locked to the recovered network clock provided from the clock/data recovery block (if the jitter attenuator is enabled on the receive side) or from the TCLKI pin (if the jitter attenuator is enabled on the transmit side). Signal Name: LIUC Signal Description: Line Interface Connect Signal Type: Input Connect low to separate the line interface circuitry from the framer/formatter circuitry and activate the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/RCLKI pins. Connect high to connect the line interface circuitry to the framer/formatter circuitry and deactivate the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/RCLKI pins. When LIUC is connected high, the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/RCLKI pins should be connected low. Signal Name: RTIP and RRING Signal Description: Receive Tip and Ring Signal Type: Input Analog inputs for clock recovery circuitry. These pins connect through a 1:1 transformer to the network. See Section 23 for details. Signal Name: TTIP and TRING Signal Description: Transmit Tip and Ring Signal Type: Output Analog line driver outputs. These pins connect through a 1:2 step-up transformer to the network. See Section 23 for details. |
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