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DS2155 Datasheet(PDF) 36 Page - Dallas Semiconductor |
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DS2155 Datasheet(HTML) 36 Page - Dallas Semiconductor |
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36 / 262 page ![]() DS2156 36 of 262 PIN LQFP CSBGA SYMBOL TYPE DESCRIPTION 49 K9 UT-UTDO O UTOPIA Transmit Data Output 50 J8 TDATA I Transmit Data 51 K10 UT-DATA7 I UTOPIA Transmit Data Bus Bit 7 52 J9 UT-CLK I UTOPIA Transmit Clock 53 H8 UR-CLK I UTOPIA Receive Clock 54 J10 ESIBS1 I/O Extended System Information Bus 1 55 G7 MUX I Bus Operation 56 H9 D0/AD0 I/O Data Bus Bit0/Address/Data Bus Bit 0 57 H10 D1/AD1 I/O Data Bus Bit1/Address/Data Bus Bit 1 58 G8 D2/AD2 I/O Data Bus Bit 2/Address/Data Bus 2 59 G9 D3/AD3 I/O Data Bus Bit 3/Address/Data Bus Bit 3 62 F9 D4/AD4 I/O Data Bus Bit4/Address/Data Bus Bit 4 63 F10 D5/AD5 I/O Data Bus Bit 5/Address/Data Bus Bit 5 64 F7 D6/AD6 I/O Data Bus Bit 6/Address/Data Bus Bit 6 65 F6 D7/AD7 I/O Data Bus Bit 7/Address/Data Bus Bit 7 66 E10 A0 I Address Bus Bit 0 67 E9 A1 I Address Bus Bit 1 68 E8 A2 I Address Bus Bit 2 69 D10 A3 I Address Bus Bit 3 70 E7 A4 I Address Bus Bit 4 71 D9 A5 I Address Bus Bit 5 72 C10 A6 I Address Bus Bit 6 73 D8 ALE (AS)/A7 I Address Latch Enable/Address Bus Bit 7 74 B10 RD (DS) I Read Input (Data Strobe) 75 C9 CS I Chip Select 76 A10 ESIBRD I/O Extended System Information Bus Read 77 B9 WR (R/W) I Write Input (Read/Write) 78 C8 UR-DATA0 O UTOPIA Receive Data Bus Bit 0 79 A9 UR-DATA1 O UTOPIA Receive Data Bus Bit 1 82 A8 RCLK O Receive Clock 85 A7 RDATA O Receive Data 86 C6 UR-DATA2 O UTOPIA Receive Data Bus Bit 2 87 B6 UR-DATA3 O UTOPIA Receive Data Bus Bit 3 88 A6 UR-DATA4 O UTOPIA Receive Data Bus Bit 4 89 D6 UR-DATA5 O UTOPIA Receive Data Bus Bit 5 90 E6 UR-DATA6 O UTOPIA Receive Data Bus Bit 6 91 A5 UR-DATA7 O UTOPIA Receive Data Bus Bit 7 92 B5 UR-ADDR0 I UTOPIA Receive Address Bus Bit 0 93 C5 UR-ADDR1 I UTOPIA Receive Address Bus Bit 1 94 A4 UR-ADDR2 I UTOPIA Receive Address Bus Bit 2 95 D5 UR-CLAV O UTOPIA Receive Cell Available 96 B4 UR-ADDR3 I UTOPIA Receive Address Bus Bit 3 97 A3 UR-ADDR4 I UTOPIA Receive Address Bus Bit 4 98 C4 RSYNC I/O Receive Sync 99 A2 RLOS/LOTC O Receive Loss-of-Sync/Loss-of-Transmit Clock 100 B3 UT-2CLAV O UTOPIA Transmit 2 Cells Available |
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