PM5347 datasheet(235/302 Pages) PMC

235 / 302 page

PM5347 S/UNI-PLUS

DATA SHEET

PMC-941033

ISSUE 6

SATURN USER NETWORK INTERFACE PLUS

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

219

Note that the RXD+/- inputs do not support single ended operation and must

always be driven by a differential source.

Figure 11

- Single Ended Driving Differential Inputs

TTL or

CMOS

signal

S/UNI-PLUS

PECL

INPUTS

PECL

signal

S/UNI-PLUS

PECL

INPUTS

0.01µF

For TTL or CMOS signals, the positive input must be grounded. The negative

input should be connected directly to a TTL or CMOS signal. In the case where

a single ended PECL source is to be used, the positive input should be

decoupled to ground through a 0.01µF capacitor.

These configurations logically invert the input signal.

12.4

Clock Recovery

Figure 12 is an abstraction of the clock recovery phase lock loop illustrating the

connections to external components. The figure illustrates the unity gain buffer

loop filter application where the integral op-amp output is buffered through a unity

gain amplifier to minimize the effect of its finite output impedance on the transfer

function of the PLL. The unity gain buffer loop filter circuit typically exceeds

SONET/SDH jitter tolerance and jitter transfer specifications and is

recommended for all designs.

PM5347 Datasheet(PDF) 235 Page - PMC-Sierra, Inc