LAN89218 datasheet(104/148 Pages) MICROCHIP

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LAN89218

DS60001255B-page 104

 2008-2015 Microchip Technology Inc.

5.4.3

ADDRL—MAC ADDRESS LOW REGISTER

The MAC Address Low register contains the lower 32 bits of the physical address of the MAC. The contents of this

EEPROM is detected. The least significant byte of this register (bits [7:0]) is loaded from address 0x01 of the

EEPROM. The most significant byte of this register is loaded from address 0x04 of the EEPROM. Refer to

Section 4.6 for more information on the EEPROM.

Table 5-7 below illustrates the byte ordering of the ADDRL and ADDRH registers with respect to the reception of the

Ethernet physical address. Also shown is the correlation between the EEPROM addresses and ADDRL and ADDRH

registers.

As an example, if the desired Ethernet physical address is 12-34-56-78-9A-BC, the ADDRL and ADDRH registers

would be programmed as shown in Figure 5-2. The values required to automatically load this configuration from the

EEPROM are also shown.

Offset:

Attribute:

R/W

Default Value:

FFFFFFFFh

Size:

32 bits

Bits

Description

31:0

Physical Address [31:0]. This field contains the lower 32 bits (31:0) of the Physical Address of the

LAN89218 device. The content of this field is undefined until loaded from the EEPROM at power-on.

The host can update the contents of this field after the initialization process has completed.

TABLE 5-7:

ADDRL, ADDRH AND EEPROM BYTE ORDERING

EEPROM Address

ADDRn

Order of Reception on Ethernet

0x01

ADDRL[7:0]

1st

0x02

ADDRL[15:8]

2nd

0x03

ADDRL[23:16]

3rd

0x04

ADDRL[31:24]

4th

0x05

ADDRH[7:0]

5th

0x06

ADDRH[15:8]

6th

FIGURE 5-2:

EXAMPLE ADDRL, ADDRH AND EEPROM SETUP

Note:

By convention, the left most byte of the Ethernet address (in this example 0x12) is the most significant byte

and is transmitted/received first.

0x12

0x34

0x56

0x78

ADDRL

0x9A

0xBC

ADDRH

0xA5

0x12

0x34

0x56

0x78

0x9A

0xBC

0x00

0x01

0x02

0x03

0x04

0x05

0x06

EEPROM

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