LAN89218 datasheet(144/148 Pages) MICROCHIP

144 / 148 page

LAN89218

DS60001255B-page 144

 2008-2015 Microchip Technology Inc.

Rev. 1.2

(11-21-08)

All

Fixed various typos

Section 5.3.23

Corrected MAC Address Loaded (bit 8) type from “RO” to “R/WC”

Chapter 7.0

Added HBM ESD value, thermal specifications, power numbers.

Table 7-8

Updated crystal specifications:

Drive Level: 300uW

ESR 50 Ohms

Rev. 1.0

(06-20-08)

Table 2-4

Fixed note cross-references in the VDD_CORE and VDD_PLL pin

descriptions.

Rev. 1.0

(06-19-08)

Figure 1-2

Diagram redone to add PLL regulator block and add the word

“core” to the original regulator block.

Table 2-4

Added new note underneath table which is referenced in the

VDD_CORE and VDD_PLL pin descriptions: “This pin must not be

used to supply power to other external devices.”

Section 3.6

Fixed pagination.

Rev. 1.0

(06-13-08)

Section 5.5.5

Bits 9 and 15 relabeled as Reserved, Read-Only (RO), with a

default of 0.

Fixed definition of bits 11:10 when equal to “11” by adding “adver-

tise support for..” to beginning of definition. Also added note stating

“When both symmetric PAUSE and asymmetric PAUSE support

are advertised, the device will only be configured to, at most, one of

the two settings upon auto-negotiation completion.”

(Bugzilla Bug 1901)

Section 5.3.1

Removed “0000” from the default value of the Chip Revision field.

This was replaced with a cross-reference to a new note which

states, “Default value is dependent on device revision.”

Section 3.5 and Section 5.4.1 Added note: “When wake-up frame detection is enabled via the

WUEN bit of the WUCSR—Wake-up Control and Status Register, a

broadcast wake-up frame will wake-up the device despite the state

of the Disable Broadcast Frame (BCAST) bit in the MAC_CR—

MAC Control Register.”

Section 5.4.12

Fixed typo in bit 9: “... Mac Address [1:0] bit set to 0.” was changed

to “...Mac Address [0] bit set to 0.”

All

Fixed various typos

Revision Level

and Date

Section/Figure/Entry

Correction

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