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TDP158 Datasheet(PDF) 32 Page - Texas Instruments

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Part # TDP158
Description  6-Gbps, AC-Coupled to TMDS or HDMI Redriver
PDF  55 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TDP158 Datasheet(HTML) 32 Page - Texas Instruments

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TDP158
SLLSEX2 – DECEMBER 2016
www.ti.com
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
8.5.3 CSR BIT FIELD DEFINITIONS, DEVICE_ID (address = 00h~07h)
Figure 27. DEVICE_ID
7
6
5
4
3
2
1
0
DEVICE_ID
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10. DEVICE_ID Field Descriptions
Bit
Field
Type
Reset
Description
7:0
R
TBD
These fields return a string of ASCII characters “TDP158”
followed by one space characters
TDP158: Address 0x00 – 0x07 = {- 0x54”T”, 0x44”D”, 0x50”P”,
0x31”1”, 0x35”5”, 0x38”8, 0x20, 0x20
8.5.4 CSR BIT FIELD DEFINITIONS, REV_ID (address = 08h )
Figure 28. REV_ID Field Descriptions
7
6
5
4
3
2
1
0
REV_ID
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11. REV_ID
Bit
Field
Type
Reset
Description
7:0
REV_ID
R
TBD
This field identifies the device revision.
0000001 – TDP158 Revision
8.5.5 CSR BIT FIELD DEFINITIONS – MISC CONTROL 09h (address = 09h)
Figure 29. MISC CONTROL 09h Field Descriptions
7
6
5
4
3
2
1
0
LANE_SWAP
Lane Control
DP-Mode
SIG_EN
PD_EN
HPD_AUTO_P
WRDWN_DISA
BLE
I2C_DR_CTL
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 12. MISC CONTROL 09h
Bit
Field
Type
Reset
Description
7
LANE_SWAP
R/W
1’b0
This field Swaps the input lanes as per Figure 23 and Swap and
valid when in HDMI Mode only.
0 --- Disable ( default ) No Lane Swap
1 --- Enable: Swaps both Input and Output Lanes
6
Lane Control
R/W
1’b0
See Lane Control
0 – Global (Default)
1 – Independent
Note: In default mode reg0C and reg0D control all lanes. When
set to 1 each lane can be individually controlled for Swing, EQ,
Pre-emphasis.
5
DP-Mode
R/W
1’b0
See DP-Mode Description
0 – Normal DP158 Operation (Default)
1 – All lanes behave as data lanes and full control through I2C
only



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