TDP158 datasheet(4/55 Pages) TI1

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TDP158

SLLSEX2 – DECEMBER 2016

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Pin Functions (continued)

I/O

DESCRIPTION

NAME

NO.

SCL_SRC

I/O

Source Side Bidirectional DDC Clock Line

CONTROL PINS

Operation Enable/Reset Pin

OE = L: Power Down Mode

OE = H: Normal Operation

Internal weak pull up: Resets device when transistions from H to L

I2C_EN

I2C_EN = High; Puts Device into I2C Control Mode

I2C_EN = Low; Puts Device into Pin Strap Mode

SDA_CTL/PRE

I/0

I2C Data Signal: When I2C_EN = High;

Pre-emphasis: When I2C_EN = Low: See Pre-emphasis

DE = L: None 0 dB

DE = H: 3.5 dB

SCL_CTL/SWAP

I2C Clock Signal: When I2C_EN = High;

Lane SWAP: When I2C_EN = Low: See Swap HDMI Mode Only

SWAP = L: Normal Operation

SWAP = H: Lane Swap

VSADJ

TMDS Compliant Voltage Swing Control Nominal

Typical: 6 K

Ω Resistor to GND

A0/EQ1

3 Level

Address Bit 1 for I2C Programming when I2C_EN = High

EQ1 Pin Setting when I2C_EN = Low; Works in conjunction with A1/EQ2; See Main Link

Inputs for settings.

A1/EQ2

3 Level

Address Bit 2 for I2C Programming when I2C_EN = High

EQ2 Pin Setting when I2C_EN = Low; Works in conjunction with A0/EQ1; See Main Link

Inputs for settings

SLEW

3 Level

Clock Slew Rate Control: See Slew Rate Control

SLEW = L: Slowest ~ 215 ps

SLEW = NC (Default): Mid-range 1 ~ 155 p

SLEW = H: Fastest ~ 125 ps

TERM

3 Level

Source Termination Cotnrol: See Transmitter Impedance Control

TERM = H, 75

Ω ~ 150 Ω

TERM = L, Transmit Termination impedance in 150

Ω ~ 300 Ω

TERM = NC, No transmit Termination

Note: When TMDS_CLOCK_RATIO_STATUS bit = 1 the TDP158 sets source

termination to 75

Ω ~ 150 Ω Automatically

No Connect

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