TDP158 datasheet(8/55 Pages) TI1

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TDP158

SLLSEX2 – DECEMBER 2016

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(1)

The Typical rating is simulated at 3.3 V VCC and 1.1 V VDD and at 27°C temperature unless otherwise noted

(2)

The Maximum rating is simulated at 3.6 V VCC and 1.27 V VDD and at 85°C temperature unless otherwise noted

6.6 Electrical Characteristics, Differential Input

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX(2)

UNIT

DR(RX_DATA

)

TMDS data lanes data rate

0.25

Gbps

DR(RX_CLK) TMDS clock lanes clock rate

340

Mhz

tRX_DUTY

Input clock duty circle

40%

50%

60%

tCLK_JIT

Input clock jitter tolerance

0.3

Tbit

tDATA_JIT

Input data jitter tolerance

Test the TTP2 See Figure 10

150

R(INT)

Input differential termination

impedance

100

120

Ω

V(ITERM)

Input Termination Voltage

OE = H

0.7

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