| Electronic Components Datasheet Search |
|
IS2064 Datasheet(PDF) 19 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
IS2064 Datasheet(HTML) 19 Page - Microchip Technology |
|
19 / 74 page ![]() 2016 Microchip Technology Inc. Advance Information DS60001409A - Page 19 IS2062/64 3.0 TRANSCEIVER The IS2062/64 SoC is designed and optimized for Bluetooth 2.4 GHz systems. It contains a complete radio frequency transmitter/receiver section. An inter- nal synthesizer generates a stable clock to synchronize with another device. 3.1 Transmitter The internal power amplifier (PA) has a maximum out- put power of +4 dBm. This is applied for Class 2 or Class 3 radios without an external RF PA. The transmitter directly performs IQ conversion to min- imize the frequency drift. 3.2 Receiver The low-noise amplifier (LNA) operates with TR- combined mode for single port application. It can save a pin on package without having an external Tx/Rx switch. The ADC is used to sample the input analog signal and convert it into digital signal for de-modulator analysis. A channel filter has been integrated into receiver channel before the ADC, which is used to reduce the external component count and increase the anti-interference capability. The image rejection filter is used to reject image frequency for low-IF architecture. This filter for low-IF architecture is intended to reduce external Band Pass Filter (BPF) component for super heterodyne architecture. Received Signal Strength Indicator (RSSI) signal feed- back to the processor is used to control the RF output power to make a good trade-off for effective distance and current consumption. 3.3 Synthesizer A synthesizer generates a clock for radio transceiver operation. There is a VCO inside, with a tunable inter- nal LC tank that can reduce variation for components. A crystal oscillator with an internal digital trimming cir- cuit provides a stable clock for synthesizer. 3.4 Modem For Bluetooth 1.2 specification and below, 1 Mbps was the standard data rate based on Gaussian Frequency Shift Keying (GFSK) modulation scheme. This basic rate modem meets Basic Data Rate (BDR) require- ments of Bluetooth 2.0 with Enhanced Data Rate (EDR) specification. For Bluetooth 2.0 and above specifications, EDR has been introduced to provide data rates of 1/2/3 Mbps. For baseband, both BDR and EDR utilize the same 1 MHz symbol rate and 1.6 kHz slot rate. For BDR, symbol 1 represents 1-bit. However, each symbol in the payload part of EDR packets represents 2-bit or 3-bit. This is achieved by using two different modulations, π/4 DQPSK and 8 DPSK. 3.5 Adaptive Frequency Hopping (AFH) The IS2062/64 SoC has an AFH function to avoid RF interference. It has an algorithm to check the nearby interference and to choose the clear channel for trans- ceiver Bluetooth signal. IS2062_64.book Page 19 Monday, May 16, 2016 6:05 PM |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |