| Electronic Components Datasheet Search |
|
ALC202 Datasheet(PDF) 23 Page - List of Unclassifed Manufacturers |
|
|
|||||||||||||||||||||||||||||
ALC202 Datasheet(HTML) 23 Page - List of Unclassifed Manufacturers |
|
23 / 29 page ![]() Preliminary Avance Logic, Inc. ALC202 - 23 - Rev0.62 http://www.realtek.com.tw 6.1.3 S/PDIF output Characteristics: Dvdd= 3.3V, Tambient=250C, with 75 ohm external load. Parameter Symbol Min Typ Max Units High level output voltage VOH 3.0 3.3 V Low level output voltage VOL - 0 0.5 V 6.2 AC Timing Characteristics 6.2.1 Cold Reset: Parameter Symbol Min Typ Max Units RESET# active low pulse width Trst_low 1.0 - - us RESET# inactive to BIT_CLK Startup delay Trst2clk 162.8 - - ns Fig 6.2.1-1 Cold reset timing diagram 6.2.2 Warm Reset: Fig 6.2.2-1 Cold reset timing diagram Parameter Symbol Min Typ Max Units SYNC active high pulse width Tsync_high 1.0 - - us SYNC inactive to BIT_CLK Startup delay Tsync2clk 162.8 - - ns 6.2.3 AC-Link Clocks: Fig 6.2.3-1 BIT_CLK and SYNC timing diagram Parameter Symbol Min Typ Max Units BIT_CLK frequency - 12.288 - MHz BIT_CLK period Tclk_period - 81.4 - ns BIT_CLK output jitter - - 750 ps BIT_CLK high pulse width (note 2) Tclk_high 36 40.7 45 ns BIT_CLK low pulse width (note 2) Tclk_low 36 40.7 45 ns SYNC frequency - 48.0 - KHz |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |