Data Sheet

ADF5901

Rev. A | Page 23 of 26

Figure 29. Register 10 (R10)

Figure 30. Register 11 (R11)

REGISTER 10

Control Bits

With Bits[C5:C1] set to 01010, Register R10 is programmed.

Figure 29 shows the input data format for programming this

register.

REGISTER 11

Control Bits

With Bits[C5:C1] set to 01011, Register R11 is programmed.

Figure 30 shows the input data format for programming this

register.

Counter Reset

Bit DB5 provides a counter reset bit for the counters. Setting

this bit to 1 performs a counter reset of the device counters.

Setting this bit to 0 returns the device to normal operation.

INITIALIZATION SEQUENCE

After powering up the device, administer the following

programming sequence. The following sequence locks the VCO

to 24.125 GHz with a 100 MHz reference and a 50 MHz

reference divider frequency:

1. Write 0x02000007 to Register R7 to perform a master reset.

2. Write 0x0000002B to Register R11 to reset the counters.

3. Write 0x0000000B to Register R11 to enable the counters.

4. Write 0x1D32A64A to Register R10.

5. Write 0x2A20B929 to Register R9.

6. Write 0x40003E88 to Register R8 to set the frequency

calibration divider clock to 100 kHz.

7. Write 0x809FE520 to Register R0 to power up the device

and LO (10 µs).

8. Write 0x011F4827 to Register R7 to set the R counter clock

to 50 MHz and the calibration clock to 100 kHz.

9. Write 0x00000006 to Register R6 to set the LSB FRAC = 0.

10. Write 0x01E28005 to Register R5 to set INT = 241 and

MSB FRAC = 1024. Therefore, N = 240.25.

11. Write 0x00200004 to Register R4 to set the ATEST pin to

high impedance.

12. Write 0x01890803 to Register R3 to set the IO level to

13. Write 0x00020642 to Register R2 to set the ADC clock to

1 MHz.

14. Write 0xFFF7FFE1 to Register R1 to set the Tx amplitude

level.

15. Write 0x809FE720 to Register R0 to set the VCO frequency

calibration (800 µs).

16. Write 0x809FE560 to Register R0 to power Tx1 on, Tx2 off,

and LO on.

17. Write 0x809FED60 to Register R0 to set the Tx1 amplitude

calibration (400 µs).

18. Write 0x809FE5A0 to Register R0 to turn Tx1 off, Tx2 on,

and LO on.

19. Write 0x809FF5A0 to Register R0 to set the Tx2 amplitude

calibration (400 µs).

20. Write 0x2800B929 to Register R9.

21. Write 0x809F25A0 to Register R0 to disable the R and N

counters.

RECALIBRATION SEQUENCE

The ADF5901 can be recalibrated after the initialization

sequence is complete and the device is powered up. The

recalibration sequence must be run for every 10°C temperature

change; the temperature can be monitored using the

temperature sensor (see the Temperature Sensor section).

1. Write 0x809FE520 to Register R0 to enable the counters.

Tx1 and Tx2 are off, and LO is on.

2. Write 0x2A20B929 to Register R9.

3. Write 0xFFF7FFE1 to Register R1 to set the Tx amplitude

level.

4. Write 0x809FE720 to Register R0 to set the VCO frequency

calibration (800 µs).

DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4

DB3

DB2

DB1

DB0

0

0

0

1

1

1

0

1

0

0

1

1

0

0

1

0

1

0

1

0

0

1

1

0

0

1

0

C4(1) C3(0) C2(1) C1(0)

CONTROL

BITS

RESERVED

C5(0)

DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4

DB3

DB2

DB1

DB0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

CR

C4(1) C3(0) C2(1) C1(1)

CONTROL

BITS

RESERVED

C5(0)

CR

0

DISABLED

1

ENABLED

CNTR RESET