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DS2196 Datasheet(PDF) 112 Page - Dallas Semiconductor |
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DS2196 Datasheet(HTML) 112 Page - Dallas Semiconductor |
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112 / 157 page  DS2196 112 of 157 RDC1A: RECEIVE HDLC DS0 CONTROL REGISTER 1 FRAMER A (Address = 90 Hex) RDC1B: RECEIVE HDLC DS0 CONTROL REGISTER 1 FRAMER B (Address = 94 Hex) (MSB) (LSB) RDS0E - RDS0M RD4 RD3 RD2 RD1 RD0 SYMBOL POSITION NAME AND DESCRIPTION RDS0E RDC1.7 HDLC DS0 Enable. 0 = use receive HDLC controller for the FDL. 1 = use receive HDLC controller for one or more DS0 channels. - RDC1.6 Not Assigned. Should be set to 0. RDS0M RDC1.5 DS0 Selection Mode. 0 = utilize the RD0 to RD4 bits to select which single DS0 channel to use. 1 = utilize the RCHBLK control registers to select which DS0 channels to use. RD4 RDC1.4 DS0 Channel Select Bit 4. MSB of the DS0 channel select. RD3 RDC1.3 DS0 Channel Select Bit 3. RD2 RDC1.2 DS0 Channel Select Bit 2. RD1 RDC1.1 DS0 Channel Select Bit 1. RD0 RDC1.0 DS0 Channel Select Bit 0. LSB of the DS0 channel select. |
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