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ZSSC3123AI2 Datasheet(PDF) 33 Page - Integrated Device Technology

Part # ZSSC3123AI2
Description  Capacitive Sensor Signal Conditioner
PDF  63 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ZSSC3123AI2 Datasheet(HTML) 33 Page - Integrated Device Technology

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ZSSC3123 Datasheet
© 2016 Integrated Device Technology, Inc.
33
January 26, 2016
tBUS
tLOW
SCLK
MISO
SS
HiZ
tHDSS
tHIGH
tCLKD
tSUSS
HiZ
tCLKD
Figure 3.9
SPI Timing Diagram
Table 3.10
SPI Parameters
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
SCLK clock frequency
fSCL
50
800
kHz
SS drop to first clock edge
tHDSS
2.5
µs
Minimum SCLK clock low width
1)
tLOW
0.6
µs
Minimum SCLK clock high width
1)
tHIGH
0.6
µs
Clock edge to data transition
tCLKD
0
0.5
µs
Rise of SS relative to last clock edge
tSUSS
0.1
µs
Bus free time between rise and fall of SS
tBUS
2
µs
1
Combined low and high widths must equal or exceed minimum SCLK period.
3.6.3
I
2C™ and SPI Commands
As detailed in Table 3.11, there are three types of commands which allow the user to interface with the ZSSC3123 in the I
2C™
or SPI modes.
Table 3.11
I
2C™ and SPI Command Types
Type
Description
Communication
Supported
Reference Sections
Data Fetch (DF)
Used to fetch data in any digital mode
I
2C™ and SPI
Section 3.6.4
Measurement Request (MR)
Used to start measurements in Sleep Mode
I
2C™ and SPI
Section 3.6.5
Calibration Commands
Used in Command Mode during the calibration
process
I
2C™ Only
Section 4.2



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