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ZSSC3123AI2 Datasheet(PDF) 62 Page - Integrated Device Technology |
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ZSSC3123AI2 Datasheet(HTML) 62 Page - Integrated Device Technology |
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62 / 63 page ![]() ZSSC3123 Datasheet © 2016 Integrated Device Technology, Inc. 62 January 26, 2016 15 Glossary 16 Document Revision History Revision Date Description 1.00 February 15, 2011 First release. 1.10 June 29, 2011 Added specification for “Excitation Frequency of External Capacitances C0 and C1” in section 1.3 and 2.2.1. Added “PDM frequency” specification to table in section 1.3. In section 3.7, clarified that clipping limit default values must be adjusted for PDM output functionality. Revised PDM frequency in sections 1.3 and 3.7. Revised PDM ripple and settling time specifications in section 1.3. Revised related examples in Table 3.12 and corrected equation (14) for calculating ripple. Revisions to text explaining equation (16) and subsequent text recommending limits for PDM_Clip_High. Revised Table 5.1 for PDM_Clip_High and PDM_Clip_Low. Added new settings for PDM clipping limits to section 7.2 and revised related settings in Table 7.2. Revised section 1.6 for addition of specifications for “Voltage Dependency” for the temperature channel to section 1.3. Revised section 2.2.1.3 regarding total capacitance. Revised default value for EEPROM word 04H from 007TH to 00FTH in Table 5.1. Minor edits for clarity in section 7.3. Revised notes for VCORE pin 1 in Table 9.2. Revisions to section 3.3.2.1. 1.20 August 16, 2011 Added specifications in section 1.3 for VPOR maximum, VREG typical and maximum, and PSRTEMP. Revisions to section 3.3.2.1 to explain preferred method for detecting valid data. Revised product ordering codes. 1.30 July 23, 2012 Added note for clarity to “Active Regulated Voltage” specification in section 1.3. Deleted redundant specification for fOSC in section 1.3. Revised the “Excitation Frequency of External Capacitances C0 and C1” (fEXC) specification in Table 1.3 to list a separate specification fMULTx for each Mult setting. Deleted inapplicable row for 2.0V for the “Error Mult 1, -40 to 125°C” specification in section 1.3. Revised specifications for CVCORE_SM and CVCORE_UM in specifications in section 1.2. Updated IDT contact information. Term Description ADC Analog-to-Digital Converter CDC Capacitance-to-Digital Converter DAC Digital-to-Analog Converter ECC Error Checking and Correction SSC Sensor Signal Conditioner |
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