TMS320VC5421 datasheet(26/104 Pages) TI1

26 / 104 page

Introduction

December 1999 − Revised October 2008

SPRS098D

Table 2−3. Signal Descriptions (Continued)

PIN NAME

DESCRIPTION

TYPE†

TEST PIN

TEST#

No connection

EMULATION/TEST PINS

TCK‡§

Standard test clock. This is normally a free-running clock signal with a 50% duty cycle. Changes on the

test access port (TAP) of input signals TMS and TDI are clocked into the TAP controller, instruction register,

or selected test-data register on the rising edge of TCK. Changes at the TAP output signal (TDO) occur

on the falling edge of TCK.

TDI‡

Test data input. Pin with an internal pullup device. TDI is clocked into the selected register (instruction or

data) on a rising edge of TCK.

TDO

O/Z

Test data output. The contents of the selected register is shifted out of TDO on the falling edge of TCK.

TDO is in high-impedance state except when the scanning of data is in progress. These pins are

placed into high-impedance state when OFF is low.

TMS‡

Test mode select. Pin with internal pullup device. This serial control input is clocked into the TAP controller

on the rising edge of TCK.

TRST||k

IEEE standard 1149.1 test reset. TRST, when high, gives the IEEE standard 1149.1 scan system control

of the operations of the device. If TRST is driven low, the device operates in its functional mode, and the

IEEE standard 1149.1 signals are ignored. Pin with internal pulldown device.

EMU0

I/O/Z

Emulator interrupt 0 pin. When TRST is driven low, EMU0 must be high for the activation of the EMU1/OFF

condition. When TRST is driven high, EMU0 is used as an interrupt to or from the emulator system and

is defined as I/O.

EMU1/OFF

I/O/Z

Emulator interrupt 1 pin. When TRST is driven high, EMU1/OFF is used as an interrupt to or from the

emulator system and is defined as I/O. When TRST transitions from high to low, then EMU1 operates as

OFF. EMU/OFF = 0 puts all output drivers into the high-impedance state.

Note that OFF is used exclusively for testing and emulation purposes (and not for multiprocessing

applications). Therefore, for the OFF condition, the following conditions apply:

TRST = 0, EMU0 = 1, EMU1 = 0

† I = Input, O = Output, S = Supply, Z = High Impedance

‡ This pin has an internal pullup resistor.

§ These pins are Schmitt triggered inputs.

¶ This pin has an internal bus holder controlled by way of the BSCR register in 54x cLEAD core of DSP subsystem A .

# This pin is used by Texas Instruments for device testing and should be left unconnected.

|| This pin has an internal pulldown resistor.

kAlthough this pin includes an internal pulldown resistor, a 470-Ω external pulldown is required. If the TRST pin is connected to multiple DSPs,

a buffer is recommended to ensure the VIL and VIH specifications are met.

TMS320VC5421 Datasheet(PDF) 26 Page - Texas Instruments

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