A8650 datasheet(11/31 Pages) ALLEGRO

11 / 31 page

Low Input Voltage, Adjustable Frequency

2 A Synchronous Buck Regulator with EN/SYNC and Power OK

A8650

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Functional Description

Overview

The A8650 is a synchronous PWM regulator that incorporates all

the control and protection circuitry necessary to satisfy a wide

range of low voltage applications. The A8650 employs current

mode control to provide fast transient response, simple compen-

sation, and excellent stability.

The features of the A8650 include a ±1% precision reference,

an adjustable switching frequency, a transconductance error

amplifier, an enable/synchronization input, integrated power

MOSFETs, adjustable soft-start time, pre-bias startup capability,

low current sleep mode, and a Power OK (POK) output.

The protection features of the A8650 include undervoltage

lockout (UVLO), cycle-by-cycle overcurrent protection (OCP),

hiccup mode short circuit protection (HIC), overvoltage protec-

tion (OVP), and thermal shutdown (TSD). In addition, the A8650

provides open circuit, adjacent pin short circuit, and pin-to-

ground short circuit protection.

Reference Voltage

The A8650 incorporates an internal reference that allows output

voltages as low as 0.8 V. The accuracy of the internal reference

is ±1% across the entire operating temperature range. The output

voltage of the regulator is adjusted by connecting a resistor

divider (RFB1 and RFB2 in the typical application schematic)

from VOUT to the FB pin of the A8650.

Oscillator/Switching Frequency

The base PWM switching frequency, fOSC, of the A8650 is

adjustable from 250 kHz to 2.45 MHz and has an accuracy of

±12% across the operating temperature range. The base fre-

quency is used to set the device switching frequency, fSW , which

can also be further increased by the optional synchronization

function (described later in the section on EN/SYNC operation).

Connecting a resistor from the FSET pin to GND, as shown in the

typical application schematic, sets the base switching frequency.

An FSET resistor with ±1% tolerance is recommended. A graph

of fOSC versus RFSET, and an equation to calculate RFSET, are

provided in the Component Selection section of this datasheet.

Transconductance Error Amplifier

The primary function of the transconductance error amplifier

is to regulate the A8650 output voltage. The error amplifier is

shown in figure 1 as a device with three inputs, two positive and

one negative. The negative input simply is connected to the FB

pin and is used to sense the feedback voltage for regulation. The

two positive inputs are connected to the soft start and reference

voltages, and the error amplifier performs an analog OR selec-

tion between them. It regulates to either the soft start pin voltage

minus the Soft Start Offset (200 mV (typ)) or the A8650 internal

reference, whichever is lower.

To stabilize the regulator, a series RC compensation network

(RZ CZ) must be connected from the error amplifier output

(COMP pin) to GND as shown in the typical application sche-

matic. In most applications, an additional, low value capacitor

(CP) should be connected in parallel with the RZ CZ compen-

sation network to roll-off the loop gain at higher frequencies.

However, if the CP capacitor is too large, the phase margin of the

regulator may be reduced.

If the regulator is disabled or a fault occurs, the COMP pin is

immediately pulled to GND via an internal 1.5 kΩ pull-down and

PWM switching is inhibited.

Slope Compensation

The A8650 incorporates internal slope compensation to allow

PWM duty cycles near or above 50% to accommodate a wide

range of input/output voltages, switching frequencies, and induc-

tor values. As shown in the functional block diagram, the slope

compensation signal is added to the sum of the current sense and

PWM Ramp Offset (VPWMOFFS). The amount of slope compensa-

tion is scaled directly with the base switching frequency (fOSC,

set by RFSET). However, the amount of slope compensation does

Error

Amplifier

COMP

VREF

800 mV

VSSOFFS 200 mV

Figure 1. A8650 Error Amplifier

XREF

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