TS8388BCGL datasheet(27/57 Pages) ATMEL

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TS8388B

2144C–BDC–04/03

TS8388B Main

Features

Timing

Information

Timing Value for

TS8388B

Timing values as defined in Table 3 on page 4 are advanced data, issued from electric simula-

tions and first characterizations results fitted with measurements.

Timing values are given at package inputs/outputs, taking into account package internal con-

trolled impedance traces propagation delays, gullwing pin model, and specified termination

loads.

Propagation delays in 50/75

Ω impedance traces are NOT taken into account for TOD and

TDR.

Apply proper derating values corresponding to termination topology.

The min/max timing values are valid over the full temperature range in the following

conditions:

•

Specified Termination Load (Differential output Data and Data Ready):

Ω resistor in parallel with 1 standard ECLinPS register from Motorola (i.e.: 10E452)

Typical ECLinPS inputs shows a typical input capacitance of 1.5 pF (including package

and ESD protections).

If addressing an output Dmux, take care if some Digital outputs do not have the same

termination load and apply corresponding derating value given below.

•

Output Termination Load derating values for TOD and TDR:

~ 35 ps/pF or 50 ps per additional ECLinPS load.

•

Propagation time delay derating values have also to be applied for TOD and TDR:

~ 6 ps/mm (155 ps/inch) for TSEV8388B Evaluation Board.

Apply proper time delay derating value if a different dielectric layer is used.

Propagation Time

Considerations

TOD and TDR Timing values are given from pin to pin and DO NOT include the additional

propagation times between device pins and input/output termination loads. For the

TSEV8388B Evaluation Board, the propagation time delay is 6 ps/mm (155 ps/inch) corre-

sponding to 3.4 (at 10 GHz) dielectric constant of the RO4003 used for the Board.

If a different dielectric layer is used (for instance Teflon), please use appropriate propagation

time values.

TD does NOT depend on propagation times because it is a differential data (TD is the time dif-

ference between Data Ready output delay and digital Data output delay).

TD is also the most straightforward data to measure, again because it is differential: TD can be

measured directly onto termination loads, with matched Oscilloscopes probes.

TOD-TDR Variation

Over Temperature

Values for TOD and TDR track each other over temperature (1% variation for TOD-TDR per

100

°C temperature variation).

Therefore TOD-TDR variation over temperature is negligible. Moreover, the internal (on-chip)

and package skews between each Data TODs and TDR effect can be considered as

negligible.

TS8388BCGL Datasheet(PDF) 27 Page - ATMEL Corporation

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