TS8388BCGL datasheet(5/57 Pages) ATMEL

5 / 57 page

TS8388B

2144C–BDC–04/03

Positive supply current

Analog

Digital

IPLUSD

1, 2

–

385

395

115

120

445

145

Negative supply voltage

VEE

1, 2, 6

-5.3

-5

-4.7

Negative supply current

Analog

Digital

AIEE

DIEE

1, 2

–

165

170

135

145

200

180

Nominal power dissipation

1, 2

–

3.4

3.6

4.1

4.3

Power supply rejection ratio

PSRR

–

0.5

Resolution

–

bits

(2)

Analog Inputs

Full Scale Input Voltage range (differential mode)

(0V common mode voltage)

VIN

VINB

–

-125

–

125

Full Scale Input Voltage range (single-ended input

option) (See Application Notes)

VINB

–

-250

–

250

–

Analog input capacitance

4–

3.5

Input bias current

–

µA

Input Resistance

RIN

40.5

–

Ω

Full Power input Bandwidth (-3dB)

CBGA68 package

CQFP68 package

FPBW

–

1.8

1.5

–

GHz

–

Small signal input Bandwidth (10% full scale)

SSBW

1.5

1.7

–

GHz

Clock Inputs

Logic compatibility for clock inputs

(See Application Notes)

––

ECL or specified clock input

power level in dBm

–

(10)

ECL Clock inputs voltages (V

CLK or VCLKB):

–

–––

–

Logic “0” voltage

VIL

––

–

-1.5

Logic “1” voltage

–-1.1

–

Logic “0” current

––

µA

Logic “1” current

IIH

––

µA

Clock input power level into 50

Ω termination

–

dBm into 50

Ω

–

Clock input power level

–

-2

dBm

Clock input capacitance

CCLK

4–

3.5

Table 3. Electrical Specifications (Continued)

Parameter

Symbol

Test

Level

Value

Unit

Note

Min

Typ

Max

TS8388BCGL Datasheet(PDF) 5 Page - ATMEL Corporation

TS8388BCGL Datasheet(HTML) 5 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57

Datasheet Download

Link URL