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S7G2 Datasheet(PDF) 87 Page - Renesas Technology Corp |
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S7G2 Datasheet(HTML) 87 Page - Renesas Technology Corp |
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87 / 116 page  R01DS0262EU0100 Rev.1.00 Page 87 of 113 Feb 23, 2016 S7G2 2. Electrical Characteristics Figure 2.72 LCD_CLK clock output timing Figure 2.73 Display output timing Figure 2.74 LCD output rise and fall times 2.4 USB Characteristics 2.4.1 USBHS Timing Table 2.34 USBHS low-speed characteristics for host only (USBHS_DP and USBHS_DM pin characteristics) (1/2) Conditions: USBHS_RREF = 2.2 kΩ ± 1%, USBMCLK = 20/24 MHz, UCLK = 48 MHz Item Symbol Min Typ Max Unit Test conditions Input characteristics Input high voltage VIH 2.0 - - V - - Input low voltage VIL -- 0.8 V - - Differential input sensitivity VDI 0.2 - - V | USBHS_DP - USBHS_DM | - Differential common-mode range VCM 0.8 - 2.5 V - - tLcyc tLOL tLOH tLOF tLOR LCD_CLK LCD_CLK tDD tDD LCD_DATA00 to LCD_DATA23, LCD_TCON0 to LCD_TCON3 Output on falling edge Output on rising edge tDr, tDf LCD output |
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