DM505 datasheet(106/290 Pages) TI1

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106

DM505

SPRS976D – NOVEMBER 2016 – REVISED JULY 2017

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Specifications

The crystal must be in the fundamental mode of operation and parallel resonant. Table 5-20 summarizes

the required electrical constraints.

Table 5-20. OSC1 Crystal Electrical Characteristics

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Parallel resonance crystal frequency

Range from 19.2 to 32

MHz

Cf1

Cf1 load capacitance for crystal parallel resonance with Cf1 = Cf2

Cf2

Cf2 load capacitance for crystal parallel resonance with Cf1 = Cf2

ESR(Cf1,Cf2)

Crystal ESR

100

Crystal shunt capacitance

ESR = 30 Ω

19.2 MHz

≤ fp ≤ 32 MHz

ESR = 40 Ω

19.2 MHz

≤ fp ≤ 32 MHz

ESR = 50 Ω

19.2 MHz

≤ fp ≤ 25 MHz

25 MHz < fp ≤ 27 MHz

27 MHz < fp ≤ 32 MHz

Not Supported

ESR = 60 Ω

19.2 MHz

≤ fp ≤ 23 MHz

23 MHz < fp ≤ 25 MHz

25 MHz < fp ≤ 32 MHz

Not Supported

ESR = 80 Ω

19.2 MHz

≤ fp ≤ 23 MHz

23 MHz < fp ≤ 25 MHz

25 MHz < fp ≤ 32 MHz

Not Supported

ESR = 100 Ω

19.2 MHz

≤ fp ≤ 20 MHz

20 MHz < fp ≤ 32 MHz

Not Supported

Crystal motional inductance for fp = 20 MHz

10.16

Crystal motional capacitance

3.42

tj(xiosc0)

Frequency accuracy(1), xi_osc1

Ethernet not used

±200

ppm

Ethernet RGMII using

derived clock

±50

ppm

(1) Crystal characteristics should account for tolerance+stability+aging.

When selecting a crystal, the system design must take into account the temperature and aging

characteristics of a crystal versus the user environment and expected lifetime of the system.

Table 5-21 details the switching characteristics of the oscillator and the requirements of the input clock.

Table 5-21. Oscillator Switching Characteristics—Crystal Mode

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Oscillation frequency

Range from 19.2 to 32

MHz

tsX

Start-up time

5.9.4.1.3.2 OSC1 Input Clock

A 1.8-V LVCMOS-Compatible Clock Input can be used instead of the internal oscillator to provide the

SYS_CLK2 clock input to the system. The external connections to support this are shown in, Figure 5-11.

The xi_osc1 pin is connected to the 1.8-V LVCMOS-Compatible clock sources. The xo_osc1 pin is left

unconnected. The vssa_osc1 pin is connected to board ground (VSS).

DM505 Datasheet(PDF) 106 Page - Texas Instruments

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