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Data Sheet

AD4020

Rev. A | Page 17 of 36

APPLICATIONS INFORMATION

TYPICAL APPLICATION DIAGRAMS

Figure 31 shows an example of the typical application diagram

for the AD4020 when multiple supplies are available. This

configuration is used for optimal performance because the

amplifier supplies can be selected to allow the maximum signal

range.

Figure 32 shows a typical application diagram when using a

single-supply system. This setup is preferable when only a

limited number of rails are available in the system and power

dissipation is of critical importance.

Figure 33 shows a typical application diagram when using a

fully differential amplifier.

V+

REF

VDD

VIO

GND

IN+

IN–

SDI

SCK

SDO

CNV

AD4020

3-WIRE/4-WIRE

INTERFACE

1.8V

1.8V TO 5V

V+

≥ +6.5V

DIGITAL HOST

(MICROPROCESSOR/

FPGA)

V–

≤ –0.5V

HOST

SUPPLY

0.1µF

V–

V+

V–

AMP

VREF

VREF/2

REF

LDO

AMP

VREF/2

10µF

10kΩ

Figure 31. Typical Application Diagram with Multiple Supplies

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