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AD4020 Datasheet(PDF) 22 Page - Analog Devices |
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AD4020 Datasheet(HTML) 22 Page - Analog Devices |
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22 / 37 page ![]() Data Sheet AD4020 Rev. A | Page 21 of 36 REF VDD VIO GND IN+ IN– SDI SCK SDO CNV AD4020 1.8V TO 5V +IN –IN R4 1kΩ DIFFERENTIAL AMPLIFIER R1 1kΩ V– AMP VREF VREF/2 0 1.8V 10µF R3 1k Ω V+ –OUT +OUT R2 1kΩ R R 0.1µF VREF/2 HOST SUPPLY C C REF V+ = +5V LDO 10kΩ 10kΩ VOCM 4.096V 0.1µF 0.1µF 3-WIRE/4-WIRE INTERFACE DIGITAL HOST (MICROPROCESSOR/ FPGA) VREF/2 Figure 36. Typical Application Diagram for Single-Ended to Differential Conversion with a Fully Differential Amplifier Single to Differential Driver For applications using a single-ended analog signal, either bipolar or unipolar, the ADA4940-1 single-ended to differential driver allows a differential input to the device. The schematic is shown in Figure 36. High Frequency Input Signals The AD4020 ac performance over a wide input frequency range is shown in Figure 37 and Figure 38. Unlike other traditional SAR ADCs, the AD4020 maintains exceptional ac performance for input frequencies up to the Nyquist frequency with minimal performance degradation. 102 96 90 100 92 94 98 88 17.0 15.5 16.5 14.5 15.0 16.0 14.0 1k 100k 10k 900k INPUT FREQUENCY (Hz) ENOB SINAD SNR Figure 37. SNR, SINAD, and ENOB vs. Input Frequency –90 –105 –95 –115 –110 –100 –120 120 105 115 95 100 110 90 1k 100k 10k 900k INPUT FREQUENCY (Hz) THD SFDR Figure 38. THD and SFDR vs. Input Frequency |
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