AD9259 datasheet(12/53 Pages) AD

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Data Sheet

AD9259

Rev. E | Page 11 of 52

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VIN + A

VIN – A

AVDD

VIN + D

VIN – D

DRVDD

NOTES

1. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE PROVIDES THE

ANALOG GROUND FOR THE PART. THIS EXPOSED PAD MUST BE CONNECTED TO

GROUND FOR PROPER OPERATIONAL.

DRGND

CLK+

CLK–

AVDD

DRVDD

DRGND

AVDD

CSB

SCLK/DTP

SDIO/ODM

PDWN

AVDD

PIN 1

INDICATOR

EXPOSED PADDLE, PIN 0

(BOTTOM OF PACKAGE)

AD9259

TOP VIEW

Figure 5.Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Description

AGND

Analog Ground (Exposed Paddle)

1, 2, 5, 6, 9, 10, 27, 32,

35, 36, 39, 45, 46

AVDD

1.8 V Analog Supply

11, 26

DRGND

Digital Output Driver Ground

12, 25

DRVDD

1.8 V Digital Output Driver Supply

VIN − D

ADC D Analog Input Complement

VIN + D

ADC D Analog Input True

CLK−

Input Clock Complement

CLK+

Input Clock True

D − D

ADC D Digital Output Complement

D + D

ADC D Digital Output True

D − C

ADC C Digital Output Complement

D + C

ADC C Digital Output True

D − B

ADC B Digital Output Complement

D + B

ADC B Digital Output True

D − A

ADC A Digital Output Complement

D + A

ADC A Digital Output True

FCO−

Frame Clock Output Complement

FCO+

Frame Clock Output True

DCO−

Data Clock Output Complement

DCO+

Data Clock Output True

SCLK/DTP

Serial Clock/Digital Test Pattern

SDIO/ODM

Serial Data I/O/Output Driver Mode

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