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AD7877

Data Sheet

SERIAL INTERFACE

The AD7877 is controlled via a 3-wire serial peripheral

interface (SPI). The SPI has a data input pin (DIN) for inputting

data to the device, a data output pin (DOUT) for reading data

back from the device, and a data clock pin (DCLK) for clocking

data into and out of the device. A chip-select pin (CS) enables

or disables the serial interface.

WRITING DATA

Data is written to the AD7877 in 16-bit words. The first four

bits of the word are the register address that directs the AD7877

to the register to write to. The next 12 bits are data. How the

AD7877 handles the data bits depends on the register address.

nothing. Register Addresses 0010b to Register Address 1110b

are 12-bit registers that perform various functions as described

in the register map.

extended writing mode that allows writing to the GPIO

configuration registers. When the register address is 1111b, the

next four bits of the data-word are the address of a GPIO

configuration register and the eight LSBs are the GPIO

configuration data. For details on the configuration of the GPIO

pins, see the General-Purpose I/O Pins section.

but this is a special register. It contains data for setting up the

ADC channel and operating mode, but Bit 20 to Bit 6 compose

the register address for reading. These define the register that is

read back during the next read operation. Control Register 1

should be the last register in the AD7877 to be programmed

before starting a conversion. The three types of data-words used

for writing are shown in Figure 46.

D15

D14

D13

D12

D11

D10

16-BIT DATA-WORD

WADD3

WADD2

WADD1

WADD0

D11

D10

WRITING TO A REGISTER

12 BITS DATA

4-BIT REGISTER WRITE ADDRESS

EADD3

EADD2

EADD1

EADD0

EXTENDED WRITE OPERATION TO GPIO REGISTERS

8 BITS GPIO DATA

4-BIT EXTENDED ADDRESS

SER/DFR CHADD3 CHADD2 CHADD1 CHADD0

RADD4

RADD3

RADD2

RADD1

RADD0

MODE 1

MODE 0

WRITING TO CONTROL REGISTER 1 TO SET ADC CHANNEL, MODE, AND READ REGISTER ADDRESS

ADC CHANNEL ADDRESS

5-BIT READ REGISTER ADDRESS

OPERATING

MODE

EXTENDED WRITE ADDRESS

CONTROL REGISTER 1 ADDRESS

NORMAL (SINGLE-ENDED)/

RATIOMETRIC (DIFFERENTIAL)

CONVERSION

Figure 46. Designation of Data-Word Bits in AD7877 Write Operations

DCLK

DOUT1

DIN2

NOTES:

1DATA IS CLOCKED OUT ON THE FALLING EDGE OF DCLK.

2INPUT DATA IS SAMPLED ON THE RISING EDGE OF DCLK.

3FOR 8-BIT REGISTERS, 8 LEADING ZEROS PRECEDE 8 BITS OF DATA.

4REGISTER READ ADDRESS INCREMENTS AUTOMATICALLY, PROVIDED THAT A NEW ADDRESS IS NOT WRITTEN TO CONTROL REGISTER 1.

HIGH-Z

0000 + 12-BIT DATA3

4-BIT ADDRESS + 12-BIT DATA

D15

Figure 47. Overall Read/Write Timing

Rev. E | Page 28 of 45

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