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TUSB1044 Datasheet(PDF) 34 Page - Texas Instruments |
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TUSB1044 Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 67 page ![]() 34 TUSB1044 SLLSF47A – FEBRUARY 2018 – REVISED FEBRUARY 2018 www.ti.com Product Folder Links: TUSB1044 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 7.5 Programming For further programmability, the TUSB1044 can be controlled using I2C. The SCL and SDA terminals are used for I2C clock and I2C data respectively. Table 9. I2C Slave Address TUSB1044 I2C Slave Address UEQ1/A1 Pin Level UEQ0/A0 Pin Level Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (W/R) 0 0 1 0 0 0 1 0 0 0/1 0 R 1 0 0 0 1 0 1 0/1 0 F 1 0 0 0 1 1 0 0/1 0 1 1 0 0 0 1 1 1 0/1 R 0 0 1 0 0 0 0 0 0/1 R R 0 1 0 0 0 0 1 0/1 R F 0 1 0 0 0 1 0 0/1 R 1 0 1 0 0 0 1 1 0/1 F 0 0 0 1 0 0 0 0 0/1 F R 0 0 1 0 0 0 1 0/1 F F 0 0 1 0 0 1 0 0/1 F 1 0 0 1 0 0 1 1 0/1 1 0 0 0 0 1 1 0 0 0/1 1 R 0 0 0 1 1 0 1 0/1 1 F 0 0 0 1 1 1 0 0/1 1 1 0 0 0 1 1 1 1 0/1 7.5.1 Use The Following Procedure to Write to TUSB1044 I2C Registers: 1. The master initiates a write operation by generating a start condition (S), followed by the TUSB1044 7-bit address and a zero-value “W/R” bit to indicate a write cycle . 2. The TUSB1044 acknowledges the address cycle. 3. The master presents the sub-address (I2C register within TUSB10444) to be written, consisting of one byte of data, MSB-first. 4. The TUSB1044 acknowledges the sub-address cycle. 5. The master presents the first byte of data to be written to the I2C register. 6. The TUSB1044 acknowledges the byte transfer. 7. The master may continue presenting additional bytes of data to be written, with each byte transfer completing with an acknowledge from the TUSB1044. 8. The master terminates the write operation by generating a stop condition (P). 7.5.2 Use The Following Procedure to Read the TUSB1044 I2C Registers: 1. The master initiates a read operation by generating a start condition (S), followed by the TUSB1044 7-bit address and a one-value “W/R” bit to indicate a read cycle 2. The TUSB1044 acknowledges the address cycle. 3. The TUSB1044 transmit the contents of the memory registers MSB-first starting at register 00h or last read sub-address+1. If a write to the T I2C register occurred prior to the read, then the TUSB1044 shall start at the sub-address specified in the write. 4. The TUSB1044 shall wait for either an acknowledge (ACK) or a not-acknowledge (NACK) from the master after each byte transfer; the I2C master acknowledges reception of each data byte transfer. 5. If an ACK is received, the TUSB1044 transmits the next byte of data. 6. The master terminates the read operation by generating a stop condition (P). |
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