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TUSB1044 Datasheet(PDF) 7 Page - Texas Instruments |
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TUSB1044 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 67 page  7 TUSB1044 www.ti.com SLLSF47A – FEBRUARY 2018 – REVISED FEBRUARY 2018 Product Folder Links: TUSB1044 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 6.5 Electrical Characteristics over operating free-air temperature and voltage range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Power PUSB- ACTIVE Average power when configured for USB 3.1 only mode. Link in U0 with GEN2 data transmission; EQ control pins = NC; K28.5 pattern at 10 Gbps; VID = 1000mVp-p; VOD Linearity = 900mVp-p; CTL1 = L; CTL0 = H 297 mW PUSB-DP- ACTIVE Average power when configured for USB 3.1 and 2 lane DP. Link in U0 with GEN2 data transmission and DP active; EQ control pins = NC; K28.5 pattern at 10 Gbps; VID = 1000mVp-p; VOD Linearity = 900mVp-p; CTL1 = H; CTL0 = H 578 mW PCUSTOM- ACTIVE Average power when configured for USB 3.1 and 2 channel custom alt mode. Link in U0 with GEN2 data transmission and custom alt mode active; EQ control pins = NC; K28.5 pattern at 10 Gbps; VID = 1000mVp-p; VOD Linearity = 900mVp- p; CTL1 = H; CTL0 = H 578 mW P4DP- ACTIVE Average power when configured for Four DP lanes Four active DP lanes; EQ control pins = NC; K28.5 pattern at 10 Gbps; VID = 1000mVp-p; VOD Linearity = 900mVp-p; CTL1 = H; CTL0 = L 564 mW PUSB-NC Average power when configured for USB3.1 only and nothing connected to TXP/N pins. No USB device connected; CTL1 = L; CTL0 = H 2.5 mW PUSB- U2U3 Average power when configured for USB3.1 only and link in U2 or U3 state. Link in U2 or U3 state; CTL1 = L; CTL0 = H 2 mW PSHUTDO WN Average power when device in Shutdown CTL1 = L; CTL0 = L; I2C_EN = 0; 0.65 mW 4-State CMOS Inputs(UEQ[1:0];DEQ[1:0], CFG[1:0], A[1:0], I2C_EN, VIO_SEL) IIH High-level input current VCC = 3.6 V; VIN = 3.6 V 20 80 µA IIL Low-level input current VCC = 3.6 V; VIN = 0 V -160 -40 µA 4-Level VTH Threshold 0 / R VCC = 3.3 V 0.55 V Threshold R/ Float VCC = 3.3 V 1.65 V Threshold Float / 1 VCC = 3.3 V 2.7 V RPU Internal pull up resistance 35 kΩ RPD Internal pull-down resistance 95 kΩ 2-State CMOS Input (CTL0, CTL1, FLIP, HPDIN, SLP_S0#, SWAP, DIR[1:0]). VIH-3.3V High-level input voltage VCC = 3.3V; VIO_SEL = "0" or "R"; 2 3.6 V VIL-3.3V Low-level input voltage VCC = 3.3V; VIO_SEL = "0" or "R"; 0 0.8 V VIH-1.8V High-level input voltage VCC = 3.3V; VIO_SEL = "F" or "1"; 1.2 3.6 V VIL-1.8V Low-level input voltage VCC = 3.3V; VIO_SEL = "F" or "1"; 0 0.4 V RPD_CTL1 Internal pull-down resistance for CTL1 500 kΩ RPD_HPDI N Internal pull-down resistance for HPDIN 500 kΩ IIH High-level input current VIN = 3.6 V -25 25 µA IIL Low-level input current VIN = GND, VCC = 3.6 V -25 25 µA I2C Control Pins SCL, SDA VIH-3.3V High-level input voltage VCC = 3.3V; VIO_SEL = "0" or "R"; I2C Mode Enabled; 2 3.6 V VIL-3.3V Low-level input voltage VCC = 3.3V; VIO_SEL = "0" or "R"; I2C Mode Enabled; 0 0.8 V VIH-1.8V High-level input voltage VCC = 3.3V; VIO_SEL = "F" or "1"; I2C Mode Enabled; 1.2 3.6 V VIL-1.8V Low-level input voltage VCC = 3.3V; VIO_SEL = "F" or "1"; I2C Mode Enabled; 0 0.4 V |
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