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AM3351 Datasheet(PDF) 171 Page - Texas Instruments |
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AM3351 Datasheet(HTML) 171 Page - Texas Instruments |
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171 / 252 page ![]() DQU7 DQU0 DMU DQSU DQSU# DQL7 DQL0 DML DQSL DQSL# CK# 16-Bit DDR3 Device 0.1 µF 49.9 1 , 20 mW Ω (± % ) 0.1 µF 0.1 µF 16-Bit DDR3 Interface DDR_D15 DDR_D8 DDR_DQM1 DDR_DQS1 DDR_DQSn1 DDR_D7 DDR_D0 DDR_DQM0 DDR_DQS0 DDR_DQSn0 DDR_CK DDR_CKn DDR_ODT DDR_CSn0 DDR_BA0 DDR_BA1 DDR_BA2 DDR_A0 DDR_A15 DDR_CASn DDR_RASn DDR_WEn DDR_CKE DDR_RESETn DDR_VREF DDR_VTP 8 8 15 CK ODT BA1 BA0 BA2 CS# A0 A15 CAS# RAS# WE# RESET# CKE ZQ VREFDQ VREFCA ZQ Zo Zo Zo Zo DDR_VREF DDR_VTT VDDS_DDR Termination is required. See terminator comments. Zo Value determined according to the DDR3 memory device data sheet. ZQ 0.1 µF Copyright © 2016, Texas Instruments Incorporated 171 AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351 www.ti.com SPRS717J – OCTOBER 2011 – REVISED APRIL 2016 Submit Documentation Feedback Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351 Peripheral Information and Timings Copyright © 2011–2016, Texas Instruments Incorporated 7.7.2.3.3.1 DDR3 Interface Schematic The DDR3 interface schematic varies, depending upon the width of the DDR3 devices used. Figure 7-47 shows the schematic connections for 16-bit interface on the AM335x device using one x16 DDR3 device and Figure 7-49 shows the schematic connections for 16-bit interface on the AM335x device using two x8 DDR3 devices. The AM335x DDR3 memory interface only supports 16-bit wide mode of operation. The AM335x device can only source one load connected to the DQS[x] and DQ[x] net class signals and two loads connected to the CK and ADDR_CTRL net class signals. For more information related to net classes, see Section 7.7.2.3.3.8. Figure 7-47. 16-Bit DDR3 Interface Using One 16-Bit DDR3 Device with VTT Termination |
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