AM3351 datasheet(220/252 Pages) TI1

220 / 252 page

MMC[x]_CLK (Output)

MMC[x]_CMD (Output)

MMC[x]_DAT[7:0] (Outputs)

RMII[x]_REFCLK

(Input)

220

AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351

SPRS717J – OCTOBER 2011 – REVISED APRIL 2016

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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351

Peripheral Information and Timings

Table 7-88. Switching Characteristics for MMC[x]_CLK

(see Figure 7-93)

NO.

PARAMETER

STANDARD MODE

HIGH-SPEED MODE

UNIT

MIN

TYP

MAX

MIN

TYP

MAX

ƒop(CLK)

Operating frequency, MMC_CLK

MHz

tcop(CLK)

Operating period: MMC_CLK

41.7

20.8

fid(CLK)

Identification mode frequency, MMC_CLK

400

kHz

tcid(CLK)

Identification mode period: MMC_CLK

2500

tw(CLKL)

Pulse duration, MMC_CLK low

(0.5 × P) –

tf(CLK)

(1)

(0.5 × P) –

tf(CLK)

(1)

tw(CLKH)

Pulse duration, MMC_CLK high

(0.5 × P) –

tr(CLK)

(1)

(0.5 × P) –

tr(CLK)

(1)

tr(CLK)

Rise time, all signals (10% to 90%)

2.2

tf(CLK)

Fall time, all signals (10% to 90%)

2.2

(1) P = MMC_CLK period

Figure 7-93. MMC[x]_CLK Timing

Table 7-89. Switching Characteristics for MMC[x]_CMD and MMC[x]_DAT[7:0]—Standard Mode

(see Figure 7-94)

NO.

PARAMETER

OPP100

OPP50

UNIT

MIN

TYP

MAX

MIN

TYP

MAX

td(CLKL-CMD)

Delay time, MMC_CLK falling clock

edge to MMC_CMD transition

–4

17.5

td(CLKL-DAT)

Delay time, MMC_CLK falling clock

edge to MMC_DATx transition

–4

17.5

Figure 7-94. MMC[x]_CMD and MMC[x]_DAT[7:0] Output Timing—Standard Mode

AM3351 Datasheet(PDF) 220 Page - Texas Instruments

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