TVP3025 datasheet(33/99 Pages) TI

33 / 99 page

2–19

2.3.8

Multiplexing Modes of Operation

The TVP3025 palette offers a highly versatile multiplexing scheme as illustrated in Table 2–8. The

multiplexing modes allow the pixel bus (P0 – 63) to be programmed to 1, 2, 4, 8, 12, 16, 24, or 32 bits/pixel

with pixel bus widths ranging from 1 bit to 64 bits. The use of on-chip multiplexing allows graphics systems

to be designed that can support multiple pixel depths and resolutions with no hardware modification. The

TVP3025 can also be configured for direct-color or true-color operation.

Multiplexing of the pixel bus is controlled by and programmed through multiplex-control registers 1 and 2.

Table 2–8 through 2–11 detail the multiplex-control register settings for each mode of operation.

2.3.8.1

Little-Endian and Big-Endian Data Format

The TVP3025 pixel bus supports both little- and big-endian data formats for all pseudo-color, direct-color,

and true-color modes of operation. The data-format select is controlled by general-control register bit 3 (see

Section 2.3.18.1). When general-control register (GCR) bit 3 is set to 0 (default), then the format is set to

little endian. When GCR bit 3 is set to 1, then the format is set to big endian.

In a big-endian design, the external VRAM data bus bits must be connected in reverse order to the TVP3025

pixel bus; i.e., D63 connected to P0, D0 connected to P63, etc. This ensures that the least significant channel

always provides the first pixel to be displayed in the pseudo-color or true-color multiplexing modes. The

difference between little- and big-endian data formats and how they affect the pixel bus operation is

discussed in detail in Appendix C.

2.3.8.2

VGA Mode

The VGA pass-through mode is used to emulate the VGA modes of most personal computers. The

advantage of this mode is that it can take data presented on the feature connector of most VGA-compatible

PC systems into the device on a separate bus, thus requiring no external multiplexing. It is also useful for

standard VGA and text modes in most graphics applications. VGA is the default mode at reset. If VGA mode

is desired at power up, an external resistor, capacitor, and diode network should be connected to the RESET

terminal (see Figure A–1).

Since this mode is designed with the feature connector philosophy, all data latching and control timing is

referenced to CLK0. When the VGA port is enabled multiplex-control register 2 bit 7 (MCR2 bit 7 = 1), CLK0

is selected as the input clock source independent of the input-clock-selection register. The VGA data latch

is always clocked by CLK0. External signals on LCLK have no effect on the VGA port, since LCLK only

latches data on the pixel port (P0 – P63). CLK0 also latches the VGABL, VGAHS, VGAVS video control

signals when in the VGA mode.

2.3.8.3

Pseudo-Color Mode

In pseudo-color mode (sometimes called color indexing), the pixel-bus inputs are used to address the

palette-RAM color look up table (CLUT). The data in each RAM location is comprised of 24 bits (8 bits for

each of the red, green, and blue color DACs). The pseudo-color mode is further grouped into 4 submodes,

depending on the data bits per pixel. In each submode, a pixel bus width of 4, 8, 16, 32 or 64 bits may be

used. Data should always be presented on the least significant bits of the pixel bus; i.e., when 16 bits are

used, the pixel data must be presented on P15 – P0, 8 bits on P7 – P0, and 4 bits on P3 – P0. See Tables 2–8

and 2–9 for more details.

Submode 1 uses a single bit plane to address the color palette. The pixel port bit is fed into bit 0 of the palette

address, with the 7 high-order address bits defined by the palette-page register (see Section 2.3.2). This

mode allows the maximum amount of multiplexing with a 64:1 ratio.

Submode 2 uses two bit planes to address the color palette. The two bits are fed into the low-order address

bits of the palette with the six high-order address bits being defined by the palette-page register. This mode

allows a maximum multiplex ratio of 32:1 on the pixel bus and is essentially a four-color alternative to

submode 1.

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