ADF4371 datasheet(34/46 Pages) AD

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ADF4371

Preliminary Technical Data

Rev. PrI | Page 34 of 46

Bits

Bit Name

Description

Reset

Access

[2:0]

ALC_REF_DAC_NOM_VCO3

Select VCO ALC Threshold (CORE B)

0x2

R/W

0: 5V VCO Operation.

1: Reserved.

10: 3.3V VCO Operation.

11: Reserved.

100: Reserved.

101: Reserved.

110: Reserved.

111: Reserved.

Address: 0x2F, Reset: 0x94, Name: REG002F

Table 44. Bit Descriptions for REG002F

Bits

Bit Name

Description

Reset

Access

SWITCH_LDO_3P3V_5V

SWITCH LDO OPERATION BETWEEN 3.3V and 5V

0x1

R/W

0: Normal Operation.

1: Powerdown 1H VCO Buffers (2H Path Only)

[6:5]

RESERVED

Reserved.

0x0

ALC_RECT_SELECT_VCO4

Sets ALC Rectifier DC Bias (CORE_A)

0x1

R/W

0: 3.3V VCO Operation.

1: 5V VCO Operation.

ALC_REF_DAC_LO_VCO4

Select ALC LOWER THRESHOLD VOLTAGE RANGE (CORE_A)

0x0

R/W

0: 5V VCO Operation.

1: 3.3V VCO Operation.

[2:0]

ALC_REF_DAC_NOM_VCO4

Select VCO ALC Threshold (CORE_A)

0x4

R/W

0: Reserved.

1: Reserved.

10: 5V VCO Operation.

11: 3.3V VCO Operation.

100: Reserved.

101: Reserved.

110: Reserved.

111: Reserved.

Address: 0x30, Reset: 0x3F, Name: REG0030

Table 45. Bit Descriptions for REG0030

Bits

Bit Name

Description

Reset

Access

[7:0]

VCO_BAND_DIV

This sets the Autocal Time per Stage - rband = PFD/(16*vco_band_div)

0x3F

R/W

ADF4371 Datasheet(PDF) 34 Page - Analog Devices

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