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ADF4371

Preliminary Technical Data

Rev. PrI | Page 2 of 46

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Specifications..................................................................................... 3

Digital Logic Timing.................................................................... 7

Absolute Maximum Ratings............................................................ 8

Thermal Resistance ...................................................................... 8

Transistor Count........................................................................... 8

ESD Caution.................................................................................. 8

Pin Configuration and Function Descriptions............................. 9

Typical Performance Characteristics ........................................... 11

Circuit Description......................................................................... 15

Reference Input........................................................................... 15

RF N Divider ............................................................................... 15

Phase Frequency Detector (PFD) and Charge Pump............ 16

MUXOUT and Lock Detect...................................................... 16

Double Buffers ............................................................................ 16

VCO.............................................................................................. 16

Output Stage................................................................................ 17

Doubler ........................................................................................ 17

Quadrupler .................................................................................. 18

Output Stage Mute ..................................................................... 18

Serial Port Interface (SPI) ......................................................... 18

Device Setup.................................................................................... 19

Step 1: Set Up the SPI Interface ................................................ 19

Step 2: Initialization Sequence.................................................. 19

Step 3: Frequency Update Sequence ........................................ 19

RF Synthesizer—A Worked Example ...................................... 42

Reference Input sensitivity ........................................................ 42

Reference Doubler and Reference Divider ............................. 43

Spurious Optimization and Fast Lock..................................... 43

Optimizing Jitter......................................................................... 43

Spur Mechanisms ....................................................................... 44

Lock Time.................................................................................... 44

Applications Information .............................................................. 45

Power Supplies ............................................................................ 45

Printed Circuit Board (PCB) Design Guidelines for an LGA

Package ........................................................................................ 45

Output Matching ........................................................................ 45

Outline Dimensions ....................................................................... 46

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