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AM29BDD160G Datasheet(PDF) 47 Page - Advanced Micro Devices

Part # AM29BDD160G
Description  16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
PDF  80 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29BDD160G Datasheet(HTML) 47 Page - Advanced Micro Devices

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Am29BDD160G
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5. No unlock or command cycles required when bank is
reading array data.
6. The Reset command is required to return to the read
mode (or to the erase-suspend-read mode if previously
in Erase Suspend) when a bank is in the autoselect
mode, or if DQ5 goes high (while the bank is providing
status information).
7. The fourth cycle of the autoselect command sequence is
a read cycle. The system must provide the bank address
to obtain the manufacturer ID or device ID information.
See the Autoselect Command section for more
information.
8. This command cannot be executed until The Unlock
Bypass command must be executed before writing this
command sequence. The Unlock Bypass Reset command
must be executed to return to normal operation.
9. This command is ignored during any embedded
program, erase or suspended operation.
10. Valid read operations include asynchronous and burst
read mode operations.
11. The device ID must be read across the fourth, fifth, and
sixth cycles. 00h in the sixth cycle indicates top boot
block, 01h indicates bottom boot block.
12. The system may read and program in non-erasing
sectors, or enter the autoselect mode, when in the
Program/Erase Suspend mode. The Program/Erase
Suspend command is valid only during a sector erase
operation, and requires the bank address.
13. The Program/Erase Resume command is valid only
during the Erase Suspend mode, and requires the bank
address.
14. Command is valid when device is ready to read array
data or when device is in autoselect mode.
15. Asynchronous read operations.
16. ACC must be at VID during the entire operation of this
command.
17. Command is ignored during any Embedded Program,
Embedded Erase, or Suspend operation.
18. The Unlock Bypass Entry command is required prior to
any Unlock Bypass operation. The Unlock Bypass Reset
command is required to return to the read mode.
Table 20. Sector Protection Command Definitions (x32 Mode) (Sheet 1 of 2)
Command
(Notes)
Cycles
Bus Cycles (Notes 1-4)
First
Second
Third
Fourth
Fifth
Sixth
Addr Data Addr Data Addr Data
Addr
Data
Addr
Data
Addr
Data
Reset
1
XXX
F0
SecSi Sector Entry
3
555
AA
2AA
55
555
88
SecSi Sector Exit
4
555
AA
2AA
55
555
90
XX
00
SecSi Protection
Bit Program (5, 6)
6
555
AA
2AA
55
555
60
OW
68
OW
48
OW
RD(0)
SecSi Protection
Bit Status
6
555
AA
2AA
55
555
60
OW
RD(0)
Password
Program (5, 7, 8)
4
555
AA
2AA
55
555
38
PWA[0-
1]
PWD[0-
1]
Password Verify
4
555
AA
2AA
55
555
C8
PWA[0-
1]
PWD[0-
1]
Password Unlock
(7, 8)
5
555
AA
2AA
55
555
28
PWA[0-
1]
PWD[0-
1]
PPB Program (5,
6)
6
555
AA
2AA
55
555
60
(SA)WP
68
(SA)WP
48
(SA)WP RD(0)
All PPB Erase (5,
9, 10)
6
555
AA
2AA
55
555
60
WP
60
(SA)WP
40
(SA)WP RD(0)
PPB Status (11,
12)
4
555
AA
2AA
55
555
90
(SA)X02
00/01
PPB Lock Bit Set
3
555
AA
2AA
55
555
78
PPB Lock Bit
Status
4
555
AA
2AA
55
(BA)
555
58
SA
RD(1)
DYB Write (7)
4
555
AA
2AA
55
555
48
SA
X1
DYB Erase (7)
4
555
AA
2AA
55
555
48
SA
X0



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