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SCD1284 Datasheet(PDF) 115 Page - Intel Corporation

Part # SCD1284
Description  IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports
PDF  176 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

SCD1284 Datasheet(HTML) 115 Page - Intel Corporation

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IEEE 1284-Compatible Parallel Interface Controller — CD1284
Datasheet
115
7.2.3
Parallel Interrupt Vector Register
The value in this register is placed on the data bus, DB[7:0], when SVCACKP* is activated in
response to an active SVCREQP*. See Section 7.4.6 on page 128 for more details on the LIVR.
7.2.4
Receive Data/Status Registers
The Receive Data/Status register serves two purposes. During a serial receive-service acknowledge
for good data, the RDSR provides access to the receive FIFO. The number of characters available
in the FIFO is indicated by the RDCR, and is described in Section 7.5. Any number of characters,
up to the value in the RDCR, can be read from the FIFO. All internal FIFO pointers are updated by
the on-chip processor.
During a serial receive exception service acknowledge, the RDSR provides both the received
character and the status that caused the exception condition. By definition, a receive exception
service request has only one character available (multiple receive exceptions produce multiple
service requests). The first read from the RDSR provides the exception status, and the second read
Register Name: PIVR
Register Description: Parallel Interrupt Vector
Access: Read only
8-Bit Hex Address: 40
Default Value: 00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
XXX
XX
IT2
IT1
IT0
IT2
IT1
IT0
Description
0
0
0
No parallel interrupt source is active.
0
0
1
Group 1: Modem signal change service request.
010
Invalid.
lll
011
1
0
0
The parallel port state machine requests service.
1
0
1
The parallel port data pipeline requests service.
110
Both the parallel port state machine and the parallel port data
pipeline request service.
111
Invalid.
Register Name: RDSR
Register Description: Receive Data
Access: Read only
8-Bit Hex Address: 62
Default Value: 00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Received Character
Register Name: RDSR
Register Description: Receive Status
Access: Read only
8-Bit Hex Address: 62
Default Value: 00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Timeout
SC Det2
SC Det1
SC Det0
Break
PE
FE
OE



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