| Electronic Components Datasheet Search |
|
SCD1284 Datasheet(PDF) 152 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
SCD1284 Datasheet(HTML) 152 Page - Intel Corporation |
|
152 / 176 page ![]() CD1284 — IEEE 1284-Compatible Parallel Interface Controller 152 Datasheet 7.8.12 Special Command Register This register provides the peripheral host processor to issue special commands to the channel control state-machine. In response, the state-machine will perform the indicated IEEE STD 1284- defined handshake on the parallel interface. Bit Description 7:5 Mode Control: These three bits control the type of transfer desired and whether or not it is enabled to do so. The ManMd bit selects Manual mode, which allows the user direct control over all parallel data and parallel port control signals. MMDir controls the direction of the MDR (Manual Data register), and ManOE is the output enable when MMDir = 1 (output mode). E1284 allows the parallel port to engage in IEEE 1284 negotiations; ETxfr enables data transfers. The ETxfr enable is only used for data transfers. EPP address read and write functions do not require that the ETxfr bit be set. 4 Ig_SEL: This bit prevents the CD1284 from considering the state of the SLCTIN* input when deciding whether or not to accept Compatibility mode forward data transfers. When Ig_SEL is reset, SLCTIN* must be active (low) to receive data on the parallel port in response to a STROBE* input. If Ig_SEL is set, SLCTIN* is not considered and data is accepted regardless of its state. The Ig_SEL bit should be set/reset together with the E1284 bit. 3:2 Host Timer Test Control [1:0]: These two bits control the clock rate of the host timeout timer and are intended primarily for manufacturing test purposes. As such, normal user-level programming should leave these bits cleared (‘0’). When these bits are set to ‘1’, the timer is completely disabled – useful for factory debug purposes. 1:0 Manual Mode Control: These two bits provide direction and output enable manual control over the parallel port. Register Name: SCR Register Description: Special Command Access: R/W 8-Bit Hex Address: 2A Default Value: 00 Bit 7Bit 6 Bit 5 Bit 4Bit 3Bit 2Bit 1Bit 0 0 0 0 TestMux ClrPs SetPs EPIrq RevRq ManMd E1284 Etxfr Mode 0 0 0 Compatibility mode; transfers disabled. 0 0 1 Compatibility mode; transfers enabled. 0 1 0 IEEE 1284 negotiation; transfers disabled. 0 1 1 IEEE 1284 negotiation; transfers enabled. 1 X X Manual mode. MMDir ManOE Mode 0 0 Reverse direction. 0 1 Reverse direction. 1 0 Forward direction disabled. 1 1 Forward direction enabled. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |