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ESP8266 Datasheet(PDF) 24 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.

Part # ESP8266
Description  General Purpose Input/Output Interface (GPIO)
PDF  117 Pages
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Manufacturer  ESPRESSIF [ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.]
Direct Link  https://www.espressif.com/
Logo ESPRESSIF - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.

ESP8266 Datasheet(HTML) 24 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.

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3. SPI Compatibility Mode User Guide
•
rd_empty, bit 1: 1, read buffer of the slave is empty, no data has been updated; 0,
there is new data in the buffer for the host to read.
•
comm_cnt, bit 2-4: count the read/write communication. Each time the ESP8266
SDIO module finishes an effective packet-reading/packet-writing, the count will
increase by 1. Therefore, the host can judge whether a read/write communication has
been effectively responded by the ESP8266.
•
intr_no, bit 5-7: the protocol does not use this variable; reserved.
•
rx_length, bit 8-23: actual length of the packets prepared in the read buffer.
•
res, bit 24-31: reserved.
The communication procedures of the host are shown as below:
•
upon receiving the interrupt request, the host reads the SDIO status register, and
then clears the interuption, and reads/writes the packets according to the status
register;
•
it checks the SDIO status register regularly, and reads/writes the packets according
to the status register.
3.3.2. Instructions on The Read/Write Buffer and The Registration Linked List
DMA will directly send packets received and sent by the ESP8266 SDIO to corresponding
memories. The ESP8266 software will define the linked list registration structure (or array),
and buffer(s). In this example, only one buffer is used, and there is only one element in the
linked list. Write the first address of the buffer into the linked list registration structure, and
write in other information. When you write the first address of the linked list structure into
the corresponding hardware register in the ESP8266, the DMA can automatically process
the SDIO and the buffer.
The linked list registration structure is shown as below:
!
•
owner: 1'b0: operator of the current link buffer is SW; operator of the current link
buffer. MAC does not use this bit. 1'b1: operator of the current link buffer is HW.
•
eof: flag of the end of the frame (for the end of AMPDU sub-frames, this flag is not
needed). When the MAC sends the frames, it is used to mark the end of the frames.
For links in eof, buffer_length[11:0] must be equal to the length of the remaining part
of the frame. Otherwise, the MAC will report an error. When the MAC receives frames,
it is used to indicate that the reception has been completed, and the value is set by
hardware.
Espressif
! /!
16 104
2017.05



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