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4. SPI Communication User Guide

2. spi_slave_isr_handler(void *para)

Function and trigger condition:

SPI interrupt processing function. Interruption will be triggered if the master operates the

correct transmission operation(read/write slave).

Code:

//0x3ff00020 is isr flag register, bit4 is for spi isr,

if(READ_PERI_REG(0x3ff00020)&BIT4){

//following 3 lines is to close spi isr enable

regvalue=READ_PERI_REG(SPI_FLASH_SLAVE(SPI));

regvalue&=~(0x3ff);

WRITE_PERI_REG(SPI_FLASH_SLAVE(SPI),regvalue);

//os_printf("SPI ISR is trigged\n"); //debug code

}else if(READ_PERI_REG(0x3ff00020)&BIT7){ //bit7 is for hspi

isr,

//following 3 lines is to clear hspi isr signal

regvalue=READ_PERI_REG(SPI_FLASH_SLAVE(HSPI));

regvalue&=~(0x1f);

WRITE_PERI_REG(SPI_FLASH_SLAVE(HSPI),regvalue);

//when master command is write slave 0x04,

//recieved data will be occur in register SPI_FLASH_C0's low 8

bit,

//also if master command is read slave 0x06,

//the low 8bit data in register SPI_FLASH_C0 will transmit to

master,

//so prepare the transmit data in SPI_FLASH_C0' low 8bit,

//if a slave transmission needs

recv_data=(uint8)READ_PERI_REG(SPI_FLASH_C0(HSPI));

/*put user code here*/

os_printf("recv data is %08x\n", recv_data);//debug code

}else if(READ_PERI_REG(0x3ff00020)&BIT9){ //bit9 is for i2s

isr,

}

Code description: As SPI store the FLASH chip by the read/write program, HSPI is used for

communication. For ESP8266 processor, there are multiple devices that share the

interruption function, including SPI module, HSPI module, I2S module, the 4’s, 7’s and 9’s

0x3ff00020 in the register.

Espressif

! /!

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2017.05

ESP8266 Datasheet(PDF) 34 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.