ESP8266 datasheet(92/117 Pages) ESPRESSIF

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11. UART Introduction

Deﬁnition: When enable receive overﬂow to interrupt and the length of the receive queue is

greater than the total length of the queue (128 Bytes), it will trigger the interrupt signal.

Trigger scene: Generally, it’s only under the case of unset ﬂow control,because there will not

occur overﬂow when has ﬂow control.Different from the full interrupt is artiﬁcially set the

threshold and the data will not lose,overﬂow interrupt triggering will usually has data loss.

Can be used for debugging and error checking.

Set enable to interrupt:

In UART_INT_ENA register

#deﬁne UART_RXFIFO_OVF_INT_ENA (BIT(4)) //Overﬂow interrupt enable bit: 1: enable; 0:

disable

Clear interrupt status:

Read queue value to make the queue length less than 128, then set the clear interrupt

status register.

Receive timeout interrupt

Interrupt status bit: UART_RXFIFO_TOUT_INT_ST

Deﬁnition:When conﬁgure threshold value of tout,enable interrupts and UART begin to

receive data, it will triggered tout interrupt once stop transmission time exceeds the set

threshold.

Applications: more applied in handling serial commands or data, process the data directly,

or post a message, or turn into deposited buffer.

Conﬁgure threshold and function enable:

Tout interrupt threshold (or threshold) in UART_CONF1 register.

Tout unit threshold is about 8 data bits uart time (approximately one byte).

#deﬁne UART_RX_TOUT_EN (BIT(31)) //Timeout function enable bit: 1: enable;0: disable

#deﬁne UART_RX_TOUT_THRHD 0x0000007F //Timeout threshold conﬁguration bits, a

total of seven and range 0 ~ 127

#deﬁne UART_RX_TOUT_THRHD_S 24 //Register offset is 24 (start from 24th bit)

Set enable to interrupt:

In UART_INT_ENA register

#deﬁne UART_RXFIFO_TOUT_INT_ENA (BIT(8)) tout // Interrupt enable bit:1: enable;0:

disable

Clear interrupt status:

Like full interrupts,tout interrupt also need to ﬁrstly read out all received ﬁfo data,then clear

interrupt status register.Otherwise, interrupt status bit will still be set after exiting.

Please see details in examples of interrupt handling.

Espressif

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2017.05

ESP8266 Datasheet(PDF) 92 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.